From: Nicholas Piggin Date: Sun, 21 May 2017 13:15:44 +0000 (+1000) Subject: powerpc/64s: SLB miss already has CTR saved for relocatable kernel X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=fe5482c04312791bb19202e47f8a7751d476251e;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git powerpc/64s: SLB miss already has CTR saved for relocatable kernel The EXCEPTION_PROLOG_1 used by SLB miss already saves CTR when the kernel is built with CONFIG_RELOCATABLE. So it does not have to be saved and reloaded when branching to slb_miss_realmode. It can be restored from the PACA as usual. Signed-off-by: Nicholas Piggin Signed-off-by: Michael Ellerman --- diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index fe3bc52aadf8..059b3a356250 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -522,7 +522,6 @@ EXC_REAL_BEGIN(data_access_slb, 0x380, 0x80) * because the distance from here to there depends on where * the kernel ends up being put. */ - mfctr r11 LOAD_HANDLER(r10, slb_miss_realmode) mtctr r10 bctr @@ -545,7 +544,6 @@ EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x80) * because the distance from here to there depends on where * the kernel ends up being put. */ - mfctr r11 LOAD_HANDLER(r10, slb_miss_realmode) mtctr r10 bctr @@ -585,7 +583,6 @@ EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x80) #ifndef CONFIG_RELOCATABLE b slb_miss_realmode #else - mfctr r11 LOAD_HANDLER(r10, slb_miss_realmode) mtctr r10 bctr @@ -603,7 +600,6 @@ EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x80) #ifndef CONFIG_RELOCATABLE b slb_miss_realmode #else - mfctr r11 LOAD_HANDLER(r10, slb_miss_realmode) mtctr r10 bctr @@ -625,10 +621,6 @@ EXC_COMMON_BEGIN(slb_miss_realmode) * procedure. */ mflr r10 -#ifdef CONFIG_RELOCATABLE - mtctr r11 -#endif - stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ @@ -657,6 +649,7 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX) mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ .machine pop + RESTORE_CTR(r9, PACA_EXSLB) RESTORE_PPR_PACA(PACA_EXSLB, r9) ld r3,PACA_EXSLB+EX_R3(r13) ld r9,PACA_EXSLB+EX_R9(r13)