From: Chandrakala Chavva <cchavva@caviumnetworks.com>
Date: Thu, 5 Mar 2015 15:06:11 +0000 (+0300)
Subject: MIPS: OCTEON: Use correct CSR to soft reset
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=fe2360f8f505ea8340f710f1c80a8f56462bdd62;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

MIPS: OCTEON: Use correct CSR to soft reset

This fixes reboot for Octeon III boards

[ralf@linux-mips.org: Dropped segment for function cvmx_reset_octeon()
which was removed by the preceeding commit.]

Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9464/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 01130e93126d..73348afa4b80 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -416,7 +416,10 @@ static void octeon_restart(char *command)
 
 	mb();
 	while (1)
-		cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
+		if (OCTEON_IS_OCTEON3())
+			cvmx_write_csr(CVMX_RST_SOFT_RST, 1);
+		else
+			cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
 }