From: Jinku Kang Date: Wed, 23 May 2018 01:25:56 +0000 (+0900) Subject: [9610] gpu: tHEx: r10p0: update definition for pm-qos cpu X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=fdd9d626ecfa953bd6fb6627b19b2cc5f7f2de53;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [9610] gpu: tHEx: r10p0: update definition for pm-qos cpu Change-Id: Ib2c74c4f857c7b4db615928b66f274a850f38fbf Signed-off-by: Jinku Kang --- diff --git a/drivers/gpu/arm/tHEx/r10p0/platform/exynos/gpu_exynos9610.c b/drivers/gpu/arm/tHEx/r10p0/platform/exynos/gpu_exynos9610.c index 41cc822c9b65..f57cac282b86 100644 --- a/drivers/gpu/arm/tHEx/r10p0/platform/exynos/gpu_exynos9610.c +++ b/drivers/gpu/arm/tHEx/r10p0/platform/exynos/gpu_exynos9610.c @@ -52,7 +52,7 @@ extern int s2m_get_dvs_is_on(void); #define LOCAL_PWR_CFG (0xF << 0) #ifdef CONFIG_MALI_DVFS -#define CPU_MAX PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE +#define CPU_MAX PM_QOS_CPU_FREQ_MAX_DEFAULT_VALUE #else #define CPU_MAX -1 #endif diff --git a/drivers/gpu/arm/tHEx/r10p0/platform/exynos/gpu_pmqos.c b/drivers/gpu/arm/tHEx/r10p0/platform/exynos/gpu_pmqos.c index febb2d3bd794..80b6b4b3bcb9 100644 --- a/drivers/gpu/arm/tHEx/r10p0/platform/exynos/gpu_pmqos.c +++ b/drivers/gpu/arm/tHEx/r10p0/platform/exynos/gpu_pmqos.c @@ -53,7 +53,7 @@ int gpu_pm_qos_command(struct exynos_context *platform, gpu_pmqos_state state) if (!platform->pmqos_int_disable) pm_qos_add_request(&exynos5_g3d_int_qos, PM_QOS_DEVICE_THROUGHPUT, 0); pm_qos_add_request(&exynos5_g3d_cpu_cluster0_min_qos, PM_QOS_CLUSTER0_FREQ_MIN, 0); - pm_qos_add_request(&exynos5_g3d_cpu_cluster1_max_qos, PM_QOS_CLUSTER1_FREQ_MAX, PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE); + pm_qos_add_request(&exynos5_g3d_cpu_cluster1_max_qos, PM_QOS_CLUSTER1_FREQ_MAX, PM_QOS_CPU_FREQ_MAX_DEFAULT_VALUE); if (platform->boost_egl_min_lock) pm_qos_add_request(&exynos5_g3d_cpu_cluster1_min_qos, PM_QOS_CLUSTER1_FREQ_MIN, 0); for (idx = 0; idx < platform->table_size; idx++) @@ -110,7 +110,7 @@ int gpu_pm_qos_command(struct exynos_context *platform, gpu_pmqos_state state) if (!platform->pmqos_int_disable) pm_qos_update_request(&exynos5_g3d_int_qos, 0); pm_qos_update_request(&exynos5_g3d_cpu_cluster0_min_qos, 0); - pm_qos_update_request(&exynos5_g3d_cpu_cluster1_max_qos, PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE); + pm_qos_update_request(&exynos5_g3d_cpu_cluster1_max_qos, PM_QOS_CPU_FREQ_MAX_DEFAULT_VALUE); break; case GPU_CONTROL_PM_QOS_EGL_SET: if (!platform->is_pm_qos_init) { @@ -120,7 +120,7 @@ int gpu_pm_qos_command(struct exynos_context *platform, gpu_pmqos_state state) /* pm_qos_update_request(&exynos5_g3d_cpu_cluster1_min_qos, platform->boost_egl_min_lock); */ pm_qos_update_request_timeout(&exynos5_g3d_cpu_cluster1_min_qos, platform->boost_egl_min_lock, 30000); for (idx = 0; idx < platform->table_size; idx++) - platform->table[idx].cpu_max_freq = PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE; + platform->table[idx].cpu_max_freq = PM_QOS_CPU_FREQ_MAX_DEFAULT_VALUE; break; case GPU_CONTROL_PM_QOS_EGL_RESET: if (!platform->is_pm_qos_init) {