From: Dave Airlie Date: Wed, 6 Apr 2016 21:08:46 +0000 (+1000) Subject: Merge branch 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux into drm... X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=fd8c61ebd4265ff1c5fa80ba351e8e1dd710fac0;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git Merge branch 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-fixes Lots of misc bug fixes for radeon and amdgpu and one for ttm. - fix vram info fetching on Fiji and unposted boards - additional vblank fixes from the conversion to drm_vblank_on/off - UVD dGPU suspend and resume fixes - lots of powerplay fixes - fix a fence leak in the pageflip code - ttm fix for platforms where CPU is 32 bit, but physical addresses are >32bits * 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux: (21 commits) drm/amdgpu: total vram size also reduces pin size drm/amd/powerplay: add uvd/vce dpm enabling flag default. drm/amd/powerplay: fix issue that resume back, dpm can't work on FIJI. drm/amdgpu: save and restore the firwmware cache part when suspend resume drm/amdgpu: save and restore UVD context with suspend and resume drm/ttm: use phys_addr_t for ttm_bus_placement drm/radeon: Only call drm_vblank_on/off between drm_vblank_init/cleanup drm/amdgpu: fence wait old rcu slot drm/amdgpu: fix leaking fence in the pageflip code drm/amdgpu: print vram type rather than just DDR drm/amdgpu/gmc: use proper register for vram type on Fiji drm/amdgpu/gmc: move vram type fetching into sw_init drm/amdgpu: Set vblank_disable_allowed = true drm/radeon: Set vblank_disable_allowed = true drm/amd/powerplay: Need to change boot to performance state in resume. drm/amd/powerplay: add new Fiji function for not setting same ps. drm/amdgpu: check dpm state before pm system fs initialized. drm/amd/powerplay: notify amdgpu whether dpm is enabled or not. drm/amdgpu: Not support disable dpm in powerplay. drm/amdgpu: add an cgs interface to notify amdgpu the dpm state. ... --- fd8c61ebd4265ff1c5fa80ba351e8e1dd710fac0