From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Mon, 21 Aug 2017 08:25:07 +0000 (+0800)
Subject: ASoC: rockchip: separate pinctrl pins from each other
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=fce7358b54c678f047273aba32f15c5dc77db77a;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

ASoC: rockchip: separate pinctrl pins from each other

pdm sdi0~3 pins are optional, for example, if 4ch required,
only sdi0~1 need to be enabled.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---

diff --git a/Documentation/devicetree/bindings/sound/rockchip,pdm.txt b/Documentation/devicetree/bindings/sound/rockchip,pdm.txt
index 921729de7346..2ad66f649a28 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,pdm.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,pdm.txt
@@ -29,11 +29,14 @@ pdm: pdm@ff040000 {
 	dma-names = "rx";
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&pdmm0_clk
-		     &pdmm0_fsync
 		     &pdmm0_sdi0
 		     &pdmm0_sdi1
 		     &pdmm0_sdi2
 		     &pdmm0_sdi3>;
-	pinctrl-1 = <&pdmm0_sleep>;
+	pinctrl-1 = <&pdmm0_clk_sleep
+		     &pdmm0_sdi0_sleep
+		     &pdmm0_sdi1_sleep
+		     &pdmm0_sdi2_sleep
+		     &pdmm0_sdi3_sleep>;
 	status = "disabled";
 };