From: Vineet Gupta Date: Mon, 24 Aug 2015 10:37:01 +0000 (+0300) Subject: ARC: perf: cap the number of counters to hardware max of 32 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=fb7c57255168d34ae34300bcf78f50aebdeae4dc;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git ARC: perf: cap the number of counters to hardware max of 32 The number of counters in PCT can never be more than 32 (while countable conditions could be 100+) for both ARCompact and ARCv2 And while at it update copyright dates. Acked-by: Peter Zijlstra Cc: Arnaldo Carvalho de Melo Signed-off-by: Vineet Gupta --- diff --git a/arch/arc/include/asm/perf_event.h b/arch/arc/include/asm/perf_event.h index e2eaf6fb0468..3c9bf285e96d 100644 --- a/arch/arc/include/asm/perf_event.h +++ b/arch/arc/include/asm/perf_event.h @@ -1,6 +1,7 @@ /* * Linux performance counter support for ARC * + * Copyright (C) 2014-2015 Synopsys, Inc. (www.synopsys.com) * Copyright (C) 2011-2013 Synopsys, Inc. (www.synopsys.com) * * This program is free software; you can redistribute it and/or modify @@ -12,8 +13,8 @@ #ifndef __ASM_PERF_EVENT_H #define __ASM_PERF_EVENT_H -/* real maximum varies per CPU, this is the maximum supported by the driver */ -#define ARC_PMU_MAX_HWEVENTS 64 +/* Max number of counters that PCT block may ever have */ +#define ARC_PERF_MAX_COUNTERS 32 #define ARC_REG_CC_BUILD 0xF6 #define ARC_REG_CC_INDEX 0x240 diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c index 79ab199a9778..c55543738ddc 100644 --- a/arch/arc/kernel/perf_event.c +++ b/arch/arc/kernel/perf_event.c @@ -1,7 +1,7 @@ /* * Linux performance counter support for ARC700 series * - * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) + * Copyright (C) 2013-2015 Synopsys, Inc. (www.synopsys.com) * * This code is inspired by the perf support of various other architectures. * @@ -22,7 +22,7 @@ struct arc_pmu { struct pmu pmu; int counter_size; /* in bits */ int n_counters; - unsigned long used_mask[BITS_TO_LONGS(ARC_PMU_MAX_HWEVENTS)]; + unsigned long used_mask[BITS_TO_LONGS(ARC_PERF_MAX_COUNTERS)]; int ev_hw_idx[PERF_COUNT_ARC_HW_MAX]; }; @@ -284,7 +284,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev) pr_err("This core does not have performance counters!\n"); return -ENODEV; } - BUG_ON(pct_bcr.c > ARC_PMU_MAX_HWEVENTS); + BUG_ON(pct_bcr.c > ARC_PERF_MAX_COUNTERS); READ_BCR(ARC_REG_CC_BUILD, cc_bcr); BUG_ON(!cc_bcr.v); /* Counters exist but No countable conditions ? */