From: Jon Hunter Date: Sat, 22 Sep 2012 08:24:15 +0000 (-0600) Subject: ARM: OMAP4: Add timer clock aliases for device-tree X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=fabcf41f3c1b29b4a4fccd321a18acfc05dc0aae;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git ARM: OMAP4: Add timer clock aliases for device-tree For OMAP4, the dmtimers are located in the Wake-up, ABE and Peripheral (PER) power domains. Hence, when the dmtimer is configured to use the "timer_sys_ck" as its functional clock the actual clock used is different depending on whether the clock is in the Wake-up, ABE or PER domain. So when we look-up the dmtimer's "timer_sys_ck" we need to specify the timer device name as well as clock alias to find the right clock. Currently, the device names for the timers have the format "omap_timer.X" where X is the timer instance number. When using to device tree, the format of the device name created by device-tree is different and has the format "." (this is assuming that the device-tree "reg" property is specified). This causes the look-up for the OMAP4 "timer_sys_ck" to fail. To fix this add new timer clock alias for using device-tree. Please note that adding a 2nd set of clock aliases for the same clocks to only temporary until device-tree migration is complete. Then we can remove the legacy aliases. Hence, I have marked the legacy aliases with a "TODO" to remove them. Signed-off-by: Jon Hunter [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley --- diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index a8454ba4b722..506506f714a8 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3316,6 +3316,7 @@ static struct omap_clk omap44xx_clks[] = { CLK("usbhs_tll", "usbtll_fck", &dummy_ck, CK_443X), CLK("omap_wdt", "ick", &dummy_ck, CK_443X), CLK(NULL, "timer_32k_ck", &sys_32k_ck, CK_443X), + /* TODO: Remove "omap_timer.X" aliases once DT migration is complete */ CLK("omap_timer.1", "timer_sys_ck", &sys_clkin_ck, CK_443X), CLK("omap_timer.2", "timer_sys_ck", &sys_clkin_ck, CK_443X), CLK("omap_timer.3", "timer_sys_ck", &sys_clkin_ck, CK_443X), @@ -3327,6 +3328,17 @@ static struct omap_clk omap44xx_clks[] = { CLK("omap_timer.6", "timer_sys_ck", &syc_clk_div_ck, CK_443X), CLK("omap_timer.7", "timer_sys_ck", &syc_clk_div_ck, CK_443X), CLK("omap_timer.8", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4a318000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), + CLK("48032000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), + CLK("48034000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), + CLK("48036000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), + CLK("4803e000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), + CLK("48086000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), + CLK("48088000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), + CLK("49038000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4903a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4903c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4903e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), CLK(NULL, "cpufreq_ck", &dpll_mpu_ck, CK_443X), };