From: Hawking Zhang Date: Thu, 9 Feb 2017 06:48:08 +0000 (+0800) Subject: drm/amdgpu/gfx9: enable cp interrupt for CGCG/CGLS/MGCG X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=f9d1b81d5763a3d5bb2c05a8add1a829a24a65cd;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/amdgpu/gfx9: enable cp interrupt for CGCG/CGLS/MGCG Required for proper handshaking between the GFX and RLC. Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Reviewed-by: Chunming Zhou Reviewed-by: Huang Rui Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 6bcf4b69cf8c..c8c441d8c2f8 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -1460,9 +1460,6 @@ static void gfx_v9_0_enable_gui_idle_interrupt(struct amdgpu_device *adev, { u32 tmp = RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0); - if (enable) - return; - tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0); tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0); tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE, enable ? 1 : 0);