From: Catalin Marinas <catalin.marinas@arm.com>
Date: Wed, 22 Oct 2008 12:04:30 +0000 (+0100)
Subject: [ARM] 5318/1: Swap the PRRR and NMRR values in proc-v7.S
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=f80a3bb252cbb0959259328b9ab02b019123ed05;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

[ARM] 5318/1: Swap the PRRR and NMRR values in proc-v7.S

A typo caused these values to be swapped leading to incorrect memory
type attributes.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---

diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 34e424041927..07f82db70945 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -180,8 +180,8 @@ __v7_setup:
 	mov	r10, #0x1f			@ domains 0, 1 = manager
 	mcr	p15, 0, r10, c3, c0, 0		@ load domain access register
 #endif
-	ldr	r5, =0x40e040e0
-	ldr	r6, =0xff0aa1a8
+	ldr	r5, =0xff0aa1a8
+	ldr	r6, =0x40e040e0
 	mcr	p15, 0, r5, c10, c2, 0		@ write PRRR
 	mcr	p15, 0, r6, c10, c2, 1		@ write NMRR
 	adr	r5, v7_crval