From: Tomohiro Kusumi Date: Tue, 28 Mar 2017 13:49:27 +0000 (+0300) Subject: scsi: ufs: add missing macros for register bits from UFSHCI spec X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=f6b254513cffedbd380b31ed7963cb639df319ee;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git scsi: ufs: add missing macros for register bits from UFSHCI spec Add macros for register bits that can be found in JESD223C (v2.1). Not all registers are defined in ufshci.h (i.e. some are unused whether macros are defined or undefined), but all the bits for those registers that are already defined should appear here. Signed-off-by: Tomohiro Kusumi Reviewed-by: Subhash Jadavani Signed-off-by: Martin K. Petersen --- diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h index d14e9b965d1e..88acfd3e21af 100644 --- a/drivers/scsi/ufs/ufshci.h +++ b/drivers/scsi/ufs/ufshci.h @@ -48,6 +48,7 @@ enum { REG_UFS_VERSION = 0x08, REG_CONTROLLER_DEV_ID = 0x10, REG_CONTROLLER_PROD_ID = 0x14, + REG_AUTO_HIBERNATE_IDLE_TIMER = 0x18, REG_INTERRUPT_STATUS = 0x20, REG_INTERRUPT_ENABLE = 0x24, REG_CONTROLLER_STATUS = 0x30, @@ -171,6 +172,7 @@ enum { /* HCE - Host Controller Enable 34h */ #define CONTROLLER_ENABLE UFS_BIT(0) #define CONTROLLER_DISABLE 0x0 +#define CRYPTO_GENERAL_ENABLE UFS_BIT(1) /* UECPA - Host UIC Error Code PHY Adapter Layer 38h */ #define UIC_PHY_ADAPTER_LAYER_ERROR UFS_BIT(31)