From: Maarten Lankhorst Date: Mon, 13 Jul 2015 14:30:31 +0000 (+0200) Subject: drm/i915: Call plane update functions directly from intel_atomic_commit. X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=f6ac4b2a121fd3362407b21e36ec71d9886ce379;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: Call plane update functions directly from intel_atomic_commit. Now that there's only a single path for all atomic updates we can call intel_(pre/post)_plane_update from intel_atomic_commit directly. This makes the intention more clear. Signed-off-by: Maarten Lankhorst Reviewed-by: Daniel Stone Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 83d7753b8b07..67c9c4f2a8bc 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13292,12 +13292,19 @@ static int intel_atomic_commit(struct drm_device *dev, /* Now enable the clocks, plane, pipe, and connectors that we set up. */ for_each_crtc_in_state(state, crtc, crtc_state, i) { - if (needs_modeset(crtc->state) && crtc->state->active) { + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + bool modeset = needs_modeset(crtc->state); + + if (modeset && crtc->state->active) { update_scanline_offset(to_intel_crtc(crtc)); dev_priv->display.crtc_enable(crtc); } + if (!modeset) + intel_pre_plane_update(intel_crtc); + drm_atomic_helper_commit_planes_on_crtc(crtc_state); + intel_post_plane_update(intel_crtc); } /* FIXME: add subpixel order */ @@ -13635,9 +13642,6 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc) struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - if (!needs_modeset(crtc->state)) - intel_pre_plane_update(intel_crtc); - if (intel_crtc->atomic.update_wm_pre) intel_update_watermarks(crtc); @@ -13664,8 +13668,6 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc) intel_crtc->atomic.start_vbl_count); intel_runtime_pm_put(dev_priv); - - intel_post_plane_update(intel_crtc); } /**