From: Derek Robson Date: Tue, 30 May 2017 06:16:55 +0000 (+1200) Subject: Drivers: ccree: cc_regs.h - align block comments X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=f6858e91eeb4d813150d116d4bcd76c3c52d51be;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git Drivers: ccree: cc_regs.h - align block comments Fixed block comment alignment, Style fix only Found using checkpatch Signed-off-by: Derek Robson Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h index e272da44783e..151341200d6a 100644 --- a/drivers/staging/ccree/cc_regs.h +++ b/drivers/staging/ccree/cc_regs.h @@ -56,8 +56,9 @@ do { \ BITFIELD_GET(reg_val, CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \ CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE)) -/* yael TBD !!! - * -* all HW includes should start with CC_ and not DX_ !! */ +/* yael TBD !!! + * all HW includes should start with CC_ and not DX_ !! + */ /*! Bit fields set */ @@ -87,10 +88,10 @@ do { \ } while (0) /* Usage example: - u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL)); - CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3); - CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1); - WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow); + * u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL)); + * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3); + * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1); + * WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow); */ #endif /*_CC_REGS_H_*/