From: Dave Airlie Date: Sat, 24 Jun 2006 06:55:34 +0000 (+1000) Subject: drm: radeon add a tcl state flush before accessing tcl vector space X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=f2a2279ffc0dfd27f6909184a29910e40ae7eebd;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git drm: radeon add a tcl state flush before accessing tcl vector space Do a tcl state flush before accessing tcl vector space. This fixes some more problems with flickering (bug #6637). drm may not be appropriate place for this, since doing that flush there might both be overkill and insufficient in some cases. However, it's hard to figure out when that flush is needed, so this has to suffice. There does not seem to be a performance penalty associated with it. From: Roland Scheidegger (DRM CVS) Signed-off-by: Dave Airlie --- diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h index 78345cee8f8e..b2a6f92d1f0f 100644 --- a/drivers/char/drm/radeon_drv.h +++ b/drivers/char/drm/radeon_drv.h @@ -38,7 +38,7 @@ #define DRIVER_NAME "radeon" #define DRIVER_DESC "ATI Radeon" -#define DRIVER_DATE "20060225" +#define DRIVER_DATE "20060519" /* Interface history: * @@ -884,6 +884,8 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp, #define RADEON_PP_CUBIC_OFFSET_T1_0 0x1e00 #define RADEON_PP_CUBIC_OFFSET_T2_0 0x1e14 +#define RADEON_SE_TCL_STATE_FLUSH 0x2284 + #define SE_VAP_CNTL__TCL_ENA_MASK 0x00000001 #define SE_VAP_CNTL__FORCE_W_TO_ONE_MASK 0x00010000 #define SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT 0x00000012 diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c index c5b8f774a599..4ca6bd13d589 100644 --- a/drivers/char/drm/radeon_state.c +++ b/drivers/char/drm/radeon_state.c @@ -2595,7 +2595,8 @@ static __inline__ int radeon_emit_vectors(drm_radeon_private_t *dev_priv, int stride = header.vectors.stride; RING_LOCALS; - BEGIN_RING(3 + sz); + BEGIN_RING(5 + sz); + OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0); OUT_RING(CP_PACKET0(RADEON_SE_TCL_VECTOR_INDX_REG, 0)); OUT_RING(start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_VECTOR_DATA_REG, (sz - 1)));