From: Gabriel Krisman Bertazi Date: Mon, 9 Jan 2017 21:56:48 +0000 (-0200) Subject: drm: Document drm_cache interface X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=f0e36723a68dfd959168c73bfa7ca6fa426eadf5;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git drm: Document drm_cache interface Notice that this uncovers an issue with the kernel-doc handling of array arguments, causing the first parameter of drm_clflush_pages() to not show up in the rst-generated page. A proposed fix is under review in linux-doc: Changes since v1: - Add section to drm-mm.rst. - Fix kernel-doc style issues. - s/memory/kernel memory/. Signed-off-by: Gabriel Krisman Bertazi Reviewed-by: Alex Deucher Signed-off-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/20170109215649.6860-1-krisman@collabora.co.uk --- diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst index 1ea94fc86caa..91d82f39fbf4 100644 --- a/Documentation/gpu/drm-mm.rst +++ b/Documentation/gpu/drm-mm.rst @@ -470,3 +470,9 @@ DRM MM Range Allocator Function References .. kernel-doc:: include/drm/drm_mm.h :internal: + +DRM Cache Handling +================== + +.. kernel-doc:: drivers/gpu/drm/drm_cache.c + :export: diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c index a7916e5f8864..5066638928ec 100644 --- a/drivers/gpu/drm/drm_cache.c +++ b/drivers/gpu/drm/drm_cache.c @@ -67,6 +67,14 @@ static void drm_cache_flush_clflush(struct page *pages[], } #endif +/** + * drm_clflush_pages - Flush dcache lines of a set of pages. + * @pages: List of pages to be flushed. + * @num_pages: Number of pages in the array. + * + * Flush every data cache line entry that points to an address belonging + * to a page in the array. + */ void drm_clflush_pages(struct page *pages[], unsigned long num_pages) { @@ -101,6 +109,13 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages) } EXPORT_SYMBOL(drm_clflush_pages); +/** + * drm_clflush_sg - Flush dcache lines pointing to a scather-gather. + * @st: struct sg_table. + * + * Flush every data cache line entry that points to an address in the + * sg. + */ void drm_clflush_sg(struct sg_table *st) { @@ -125,6 +140,14 @@ drm_clflush_sg(struct sg_table *st) } EXPORT_SYMBOL(drm_clflush_sg); +/** + * drm_clflush_virt_range - Flush dcache lines of a region + * @addr: Initial kernel memory address. + * @length: Region size. + * + * Flush every data cache line entry that points to an address in the + * region requested. + */ void drm_clflush_virt_range(void *addr, unsigned long length) {