From: Michal Simek <monstr@monstr.eu>
Date: Mon, 15 Mar 2010 07:48:27 +0000 (+0100)
Subject: microblaze: Support systems without lmb bram
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=ee68f1745e7734a55c8bf680f6f464205f1f15da;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

microblaze: Support systems without lmb bram

When the system has no lmb bram, main memory should be start from
zero because of microblaze vectors.

DTS fragment could look like:
	DDR2_SDRAM: memory@0 {
		device_type = "memory";
		reg = < 0x0 0x10000000 >;
	} ;

Then you have to setup CONFIG_KERNEL_BASE_ADDR=0 which caused
that kernel physical start address will be zero. On reset vector place
will be jump to 0x100 and on 0x100 starts kernel text.

You have to solve how to load the kernel before cpu starts.
Tested with XMD.

Signed-off-by: Michal Simek <monstr@monstr.eu>
---

diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index cb7815cfe5ab..e397d5d52571 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -51,6 +51,12 @@ swapper_pg_dir:
 
 	.text
 ENTRY(_start)
+#if CONFIG_KERNEL_BASE_ADDR == 0
+	brai	TOPHYS(real_start)
+	.org	0x100
+real_start:
+#endif
+
 	mfs	r1, rmsr
 	andi	r1, r1, ~2
 	mts	rmsr, r1