From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed, 8 Dec 2010 17:32:24 +0000 (+0000)
Subject: drm/i915: Terminate the FORCE WAKE after we have finished reading
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=eb43f4af7ecb7d51ba44f5e96bf74eedf1c27d62;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

drm/i915: Terminate the FORCE WAKE after we have finished reading

Once we have read the value out of the GT power well, we need to remove
the FORCE WAKE bit to allow the system to auto-power down.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 2be344a8e93b..5f20cd988612 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -244,6 +244,28 @@ void intel_detect_pch (struct drm_device *dev)
 	}
 }
 
+void __gen6_force_wake_get(struct drm_i915_private *dev_priv)
+{
+	int count;
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
+		udelay(10);
+
+	I915_WRITE_NOTRACE(FORCEWAKE, 1);
+	POSTING_READ(FORCEWAKE);
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
+		udelay(10);
+}
+
+void __gen6_force_wake_put(struct drm_i915_private *dev_priv)
+{
+	I915_WRITE_NOTRACE(FORCEWAKE, 0);
+	POSTING_READ(FORCEWAKE);
+}
+
 static int i915_drm_freeze(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b8a55008a1b5..30780f2cab6f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1341,17 +1341,20 @@ __i915_write(64, q)
  * must be set to prevent GT core from power down and stale values being
  * returned.
  */
+void __gen6_force_wake_get(struct drm_i915_private *dev_priv);
+void __gen6_force_wake_put (struct drm_i915_private *dev_priv);
 static inline u32 i915_safe_read(struct drm_i915_private *dev_priv, u32 reg)
 {
-	if (IS_GEN6(dev_priv->dev)) {
-		I915_WRITE_NOTRACE(FORCEWAKE, 1);
-		POSTING_READ(FORCEWAKE);
-		/* XXX How long do we really need to wait here?
-		 * Will different registers/engines require different periods?
-		 */
-		udelay(100);
-	}
-	return I915_READ(reg);
+	u32 val;
+
+	if (dev_priv->info->gen >= 6) {
+		__gen6_force_wake_get(dev_priv);
+		val = I915_READ(reg);
+		__gen6_force_wake_put(dev_priv);
+	} else
+		val = I915_READ(reg);
+
+	return val;
 }
 
 static inline void
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3e03094cf148..2a36e05f1b85 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3115,4 +3115,5 @@
 #define  EDP_LINK_TRAIN_VOL_EMP_MASK_SNB	(0x3f<<22)
 
 #define  FORCEWAKE				0xA18C
+#define  FORCEWAKE_ACK				0x130090
 #endif /* _I915_REG_H_ */