From: Kukjin Kim Date: Wed, 28 Sep 2011 12:06:52 +0000 (+0900) Subject: ARM: SAMSUNG: Move S5P header files to plat-samsung X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=e90a0f3c460406d6a5a698016bc525c3e6968cb6;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git ARM: SAMSUNG: Move S5P header files to plat-samsung This patch moves header files from plat-s5p to plat-samsung to remove plat-s5p directory to make one plat-samsung directory for Samsung SoCs. Signed-off-by: Kukjin Kim --- diff --git a/arch/arm/plat-s5p/include/plat/camport.h b/arch/arm/plat-s5p/include/plat/camport.h deleted file mode 100644 index 71688c8ba288..000000000000 --- a/arch/arm/plat-s5p/include/plat/camport.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co., Ltd. - * - * S5P series camera interface helper functions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef PLAT_S5P_CAMPORT_H_ -#define PLAT_S5P_CAMPORT_H_ __FILE__ - -enum s5p_camport_id { - S5P_CAMPORT_A, - S5P_CAMPORT_B, -}; - -/* - * The helper functions to configure GPIO for the camera parallel bus. - * The camera port can be multiplexed with any FIMC entity, even multiple - * FIMC entities are allowed to be attached to a single port simultaneously. - * These functions are to be used in the board setup code. - */ -int s5pv210_fimc_setup_gpio(enum s5p_camport_id id); -int exynos4_fimc_setup_gpio(enum s5p_camport_id id); - -#endif diff --git a/arch/arm/plat-s5p/include/plat/ehci.h b/arch/arm/plat-s5p/include/plat/ehci.h deleted file mode 100644 index 6ae6810c7569..000000000000 --- a/arch/arm/plat-s5p/include/plat/ehci.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co.Ltd - * Author: Joonyoung Shim - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __PLAT_S5P_EHCI_H -#define __PLAT_S5P_EHCI_H - -struct s5p_ehci_platdata { - int (*phy_init)(struct platform_device *pdev, int type); - int (*phy_exit)(struct platform_device *pdev, int type); -}; - -extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd); - -#endif /* __PLAT_S5P_EHCI_H */ diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h deleted file mode 100644 index ba9121c60a2a..000000000000 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ /dev/null @@ -1,115 +0,0 @@ -/* linux/arch/arm/plat-s5p/include/plat/irqs.h - * - * Copyright (c) 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5P Common IRQ support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_S5P_IRQS_H -#define __ASM_PLAT_S5P_IRQS_H __FILE__ - -/* we keep the first set of CPU IRQs out of the range of - * the ISA space, so that the PC104 has them to itself - * and we don't end up having to do horrible things to the - * standard ISA drivers.... - * - * note, since we're using the VICs, our start must be a - * mulitple of 32 to allow the common code to work - */ - -#define S5P_IRQ_OFFSET (32) - -#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET) - -#define S5P_VIC0_BASE S5P_IRQ(0) -#define S5P_VIC1_BASE S5P_IRQ(32) -#define S5P_VIC2_BASE S5P_IRQ(64) -#define S5P_VIC3_BASE S5P_IRQ(96) - -#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32)) - -#define IRQ_VIC0_BASE S5P_VIC0_BASE -#define IRQ_VIC1_BASE S5P_VIC1_BASE -#define IRQ_VIC2_BASE S5P_VIC2_BASE - -/* UART interrupts, each UART has 4 intterupts per channel so - * use the space between the ISA and S3C main interrupts. Note, these - * are not in the same order as the S3C24XX series! */ - -#define IRQ_S5P_UART_BASE0 (16) -#define IRQ_S5P_UART_BASE1 (20) -#define IRQ_S5P_UART_BASE2 (24) -#define IRQ_S5P_UART_BASE3 (28) - -#define UART_IRQ_RXD (0) -#define UART_IRQ_ERR (1) -#define UART_IRQ_TXD (2) - -#define IRQ_S5P_UART_RX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR0 (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR) - -#define IRQ_S5P_UART_RX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR1 (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR) - -#define IRQ_S5P_UART_RX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR2 (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR) - -#define IRQ_S5P_UART_RX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR3 (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR) - -/* S3C compatibilty defines */ -#define IRQ_S3CUART_RX0 IRQ_S5P_UART_RX0 -#define IRQ_S3CUART_RX1 IRQ_S5P_UART_RX1 -#define IRQ_S3CUART_RX2 IRQ_S5P_UART_RX2 -#define IRQ_S3CUART_RX3 IRQ_S5P_UART_RX3 - -/* VIC based IRQs */ - -#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) -#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x)) -#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) -#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) - -#define S5P_TIMER_IRQ(x) (11 + (x)) - -#define IRQ_TIMER0 S5P_TIMER_IRQ(0) -#define IRQ_TIMER1 S5P_TIMER_IRQ(1) -#define IRQ_TIMER2 S5P_TIMER_IRQ(2) -#define IRQ_TIMER3 S5P_TIMER_IRQ(3) -#define IRQ_TIMER4 S5P_TIMER_IRQ(4) - -#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ - : ((x) - 16 + S5P_EINT_BASE2)) - -#define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \ - ((irq) - S5P_EINT_BASE1) : \ - ((irq) + 16 - S5P_EINT_BASE2)) - -#define IRQ_EINT_BIT(x) EINT_OFFSET(x) - -/* Typically only a few gpio chips require gpio interrupt support. - To avoid memory waste irq descriptors are allocated only for - S5P_GPIOINT_GROUP_COUNT chips, each with total number of - S5P_GPIOINT_GROUP_SIZE pins/irqs. Each GPIOINT group can be assiged - to any gpio chip with the s5p_register_gpio_interrupt() function */ -#define S5P_GPIOINT_GROUP_COUNT 4 -#define S5P_GPIOINT_GROUP_SIZE 8 -#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE) - -/* IRQ types common for all s5p platforms */ -#define S5P_IRQ_TYPE_LEVEL_LOW (0x00) -#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01) -#define S5P_IRQ_TYPE_EDGE_FALLING (0x02) -#define S5P_IRQ_TYPE_EDGE_RISING (0x03) -#define S5P_IRQ_TYPE_EDGE_BOTH (0x04) - -#endif /* __ASM_PLAT_S5P_IRQS_H */ diff --git a/arch/arm/plat-s5p/include/plat/mfc.h b/arch/arm/plat-s5p/include/plat/mfc.h deleted file mode 100644 index 6697f8cb2949..000000000000 --- a/arch/arm/plat-s5p/include/plat/mfc.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co.Ltd - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __PLAT_S5P_MFC_H -#define __PLAT_S5P_MFC_H - -/** - * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver - * @rbase: base address for MFC 'right' memory interface - * @rsize: size of the memory reserved for MFC 'right' interface - * @lbase: base address for MFC 'left' memory interface - * @lsize: size of the memory reserved for MFC 'left' interface - * - * This function reserves system memory for both MFC device memory - * interfaces and registers it to respective struct device entries as - * coherent memory. - */ -void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, - phys_addr_t lbase, unsigned int lsize); - -#endif /* __PLAT_S5P_MFC_H */ diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h deleted file mode 100644 index 9bd254c5ed22..000000000000 --- a/arch/arm/plat-s5p/include/plat/mipi_csis.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd. - * - * S5P series MIPI CSI slave device support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef PLAT_S5P_MIPI_CSIS_H_ -#define PLAT_S5P_MIPI_CSIS_H_ __FILE__ - -struct platform_device; - -/** - * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver - * @clk_rate: bus clock frequency - * @lanes: number of data lanes used - * @alignment: data alignment in bits - * @hs_settle: HS-RX settle time - * @fixed_phy_vdd: false to enable external D-PHY regulator management in the - * driver or true in case this regulator has no enable function - * @phy_enable: pointer to a callback controlling D-PHY enable/reset - */ -struct s5p_platform_mipi_csis { - unsigned long clk_rate; - u8 lanes; - u8 alignment; - u8 hs_settle; - bool fixed_phy_vdd; - int (*phy_enable)(struct platform_device *pdev, bool on); -}; - -/** - * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control - * @pdev: MIPI-CSIS platform device - * @on: true to enable D-PHY and deassert its reset - * false to disable D-PHY - */ -int s5p_csis_phy_enable(struct platform_device *pdev, bool on); - -#endif /* PLAT_S5P_MIPI_CSIS_H_ */ diff --git a/arch/arm/plat-s5p/include/plat/regs-srom.h b/arch/arm/plat-s5p/include/plat/regs-srom.h deleted file mode 100644 index f121ab5e76cb..000000000000 --- a/arch/arm/plat-s5p/include/plat/regs-srom.h +++ /dev/null @@ -1,54 +0,0 @@ -/* linux/arch/arm/plat-s5p/include/plat/regs-srom.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P SROMC register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_S5P_REGS_SROM_H -#define __ASM_PLAT_S5P_REGS_SROM_H __FILE__ - -#include - -#define S5P_SROMREG(x) (S5P_VA_SROMC + (x)) - -#define S5P_SROM_BW S5P_SROMREG(0x0) -#define S5P_SROM_BC0 S5P_SROMREG(0x4) -#define S5P_SROM_BC1 S5P_SROMREG(0x8) -#define S5P_SROM_BC2 S5P_SROMREG(0xc) -#define S5P_SROM_BC3 S5P_SROMREG(0x10) -#define S5P_SROM_BC4 S5P_SROMREG(0x14) -#define S5P_SROM_BC5 S5P_SROMREG(0x18) - -/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ - -#define S5P_SROM_BW__DATAWIDTH__SHIFT 0 -#define S5P_SROM_BW__ADDRMODE__SHIFT 1 -#define S5P_SROM_BW__WAITENABLE__SHIFT 2 -#define S5P_SROM_BW__BYTEENABLE__SHIFT 3 - -#define S5P_SROM_BW__CS_MASK 0xf - -#define S5P_SROM_BW__NCS0__SHIFT 0 -#define S5P_SROM_BW__NCS1__SHIFT 4 -#define S5P_SROM_BW__NCS2__SHIFT 8 -#define S5P_SROM_BW__NCS3__SHIFT 12 -#define S5P_SROM_BW__NCS4__SHIFT 16 -#define S5P_SROM_BW__NCS5__SHIFT 20 - -/* applies to same to BCS0 - BCS3 */ - -#define S5P_SROM_BCX__PMC__SHIFT 0 -#define S5P_SROM_BCX__TACP__SHIFT 4 -#define S5P_SROM_BCX__TCAH__SHIFT 8 -#define S5P_SROM_BCX__TCOH__SHIFT 12 -#define S5P_SROM_BCX__TACC__SHIFT 16 -#define S5P_SROM_BCX__TCOS__SHIFT 24 -#define S5P_SROM_BCX__TACS__SHIFT 28 - -#endif /* __ASM_PLAT_S5P_REGS_SROM_H */ diff --git a/arch/arm/plat-s5p/include/plat/reset.h b/arch/arm/plat-s5p/include/plat/reset.h deleted file mode 100644 index 335e97812eed..000000000000 --- a/arch/arm/plat-s5p/include/plat/reset.h +++ /dev/null @@ -1,16 +0,0 @@ -/* linux/arch/arm/plat-s5p/include/plat/reset.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_S5P_RESET_H -#define __ASM_PLAT_S5P_RESET_H __FILE__ - -extern void (*s5p_reset_hook)(void); - -#endif /* __ASM_PLAT_S5P_RESET_H */ diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h deleted file mode 100644 index 769b5bdfb046..000000000000 --- a/arch/arm/plat-s5p/include/plat/s5p-clock.h +++ /dev/null @@ -1,55 +0,0 @@ -/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Header file for s5p clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_S5P_CLOCK_H -#define __ASM_PLAT_S5P_CLOCK_H __FILE__ - -#include - -#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) - -#define clk_fin_apll clk_ext_xtal_mux -#define clk_fin_mpll clk_ext_xtal_mux -#define clk_fin_epll clk_ext_xtal_mux -#define clk_fin_dpll clk_ext_xtal_mux -#define clk_fin_vpll clk_ext_xtal_mux -#define clk_fin_hpll clk_ext_xtal_mux - -extern struct clk clk_ext_xtal_mux; -extern struct clk clk_xusbxti; -extern struct clk clk_48m; -extern struct clk s5p_clk_27m; -extern struct clk clk_fout_apll; -extern struct clk clk_fout_mpll; -extern struct clk clk_fout_epll; -extern struct clk clk_fout_dpll; -extern struct clk clk_fout_vpll; -extern struct clk clk_arm; -extern struct clk clk_vpll; - -extern struct clksrc_sources clk_src_apll; -extern struct clksrc_sources clk_src_mpll; -extern struct clksrc_sources clk_src_epll; -extern struct clksrc_sources clk_src_dpll; - -extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); - -/* Common EPLL operations for S5P platform */ -extern int s5p_epll_enable(struct clk *clk, int enable); -extern unsigned long s5p_epll_get_rate(struct clk *clk); - -/* SPDIF clk operations common for S5PC100/V210/C110 and Exynos4 */ -extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate); -extern unsigned long s5p_spdif_get_rate(struct clk *clk); - -extern struct clk_ops s5p_sclk_spdif_ops; -#endif /* __ASM_PLAT_S5P_CLOCK_H */ diff --git a/arch/arm/plat-s5p/include/plat/s5p-time.h b/arch/arm/plat-s5p/include/plat/s5p-time.h deleted file mode 100644 index 575e88109db8..000000000000 --- a/arch/arm/plat-s5p/include/plat/s5p-time.h +++ /dev/null @@ -1,40 +0,0 @@ -/* linux/arch/arm/plat-s5p/include/plat/s5p-time.h - * - * Copyright 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Header file for s5p time support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_S5P_TIME_H -#define __ASM_PLAT_S5P_TIME_H __FILE__ - -/* S5P HR-Timer Clock mode */ -enum s5p_timer_mode { - S5P_PWM0, - S5P_PWM1, - S5P_PWM2, - S5P_PWM3, - S5P_PWM4, -}; - -struct s5p_timer_source { - unsigned int event_id; - unsigned int source_id; -}; - -/* Be able to sleep for atleast 4 seconds (usually more) */ -#define S5PTIMER_MIN_RANGE 4 - -#define TCNT_MAX 0xffffffff -#define NON_PERIODIC 0 -#define PERIODIC 1 - -extern void __init s5p_set_timer_source(enum s5p_timer_mode event, - enum s5p_timer_mode source); -extern struct sys_timer s5p_timer; -#endif /* __ASM_PLAT_S5P_TIME_H */ diff --git a/arch/arm/plat-s5p/include/plat/sysmmu.h b/arch/arm/plat-s5p/include/plat/sysmmu.h deleted file mode 100644 index bf5283c2a19d..000000000000 --- a/arch/arm/plat-s5p/include/plat/sysmmu.h +++ /dev/null @@ -1,95 +0,0 @@ -/* linux/arch/arm/plat-s5p/include/plat/sysmmu.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Samsung System MMU driver for S5P platform - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM__PLAT_SYSMMU_H -#define __ASM__PLAT_SYSMMU_H __FILE__ - -enum S5P_SYSMMU_INTERRUPT_TYPE { - SYSMMU_PAGEFAULT, - SYSMMU_AR_MULTIHIT, - SYSMMU_AW_MULTIHIT, - SYSMMU_BUSERROR, - SYSMMU_AR_SECURITY, - SYSMMU_AR_ACCESS, - SYSMMU_AW_SECURITY, - SYSMMU_AW_PROTECTION, /* 7 */ - SYSMMU_FAULTS_NUM -}; - -#ifdef CONFIG_S5P_SYSTEM_MMU - -#include - -/** - * s5p_sysmmu_enable() - enable system mmu of ip - * @ips: The ip connected system mmu. - * #pgd: Base physical address of the 1st level page table - * - * This function enable system mmu to transfer address - * from virtual address to physical address - */ -void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd); - -/** - * s5p_sysmmu_disable() - disable sysmmu mmu of ip - * @ips: The ip connected system mmu. - * - * This function disable system mmu to transfer address - * from virtual address to physical address - */ -void s5p_sysmmu_disable(sysmmu_ips ips); - -/** - * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table - * @ips: The ip connected system mmu. - * @pgd: The page table base address. - * - * This function set page table base address - * When system mmu transfer address from virtaul address to physical address, - * system mmu refer address information from page table - */ -void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd); - -/** - * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu - * @ips: The ip connected system mmu. - * - * This function flush all TLB entry in system mmu - */ -void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips); - -/** s5p_sysmmu_set_fault_handler() - Fault handler for System MMUs - * @itype: type of fault. - * @pgtable_base: the physical address of page table base. This is 0 if @ips is - * SYSMMU_BUSERROR. - * @fault_addr: the device (virtual) address that the System MMU tried to - * translated. This is 0 if @ips is SYSMMU_BUSERROR. - * Called when interrupt occurred by the System MMUs - * The device drivers of peripheral devices that has a System MMU can implement - * a fault handler to resolve address translation fault by System MMU. - * The meanings of return value and parameters are described below. - - * return value: non-zero if the fault is correctly resolved. - * zero if the fault is not handled. - */ -void s5p_sysmmu_set_fault_handler(sysmmu_ips ips, - int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype, - unsigned long pgtable_base, - unsigned long fault_addr)); -#else -#define s5p_sysmmu_enable(ips, pgd) do { } while (0) -#define s5p_sysmmu_disable(ips) do { } while (0) -#define s5p_sysmmu_set_tablebase_pgd(ips, pgd) do { } while (0) -#define s5p_sysmmu_tlb_invalidate(ips) do { } while (0) -#define s5p_sysmmu_set_fault_handler(ips, handler) do { } while (0) -#endif -#endif /* __ASM_PLAT_SYSMMU_H */ diff --git a/arch/arm/plat-s5p/include/plat/system-reset.h b/arch/arm/plat-s5p/include/plat/system-reset.h deleted file mode 100644 index f307f34e6422..000000000000 --- a/arch/arm/plat-s5p/include/plat/system-reset.h +++ /dev/null @@ -1,31 +0,0 @@ -/* linux/arch/arm/plat-s5p/include/plat/system-reset.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h - * - * S5P - System define for arch_reset() - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include - -void (*s5p_reset_hook)(void); - -static void arch_reset(char mode, const char *cmd) -{ - /* SWRESET support in s5p_reset_hook() */ - - if (s5p_reset_hook) - s5p_reset_hook(); - - /* Perform reset using Watchdog reset - * if there is no s5p_reset_hook() - */ - - arch_wdt_reset(); -} diff --git a/arch/arm/plat-s5p/include/plat/usb-phy.h b/arch/arm/plat-s5p/include/plat/usb-phy.h deleted file mode 100644 index 6dd6bcfca3ce..000000000000 --- a/arch/arm/plat-s5p/include/plat/usb-phy.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co.Ltd - * Author: Joonyoung Shim - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __PLAT_S5P_USB_PHY_H -#define __PLAT_S5P_USB_PHY_H - -enum s5p_usb_phy_type { - S5P_USB_PHY_DEVICE, - S5P_USB_PHY_HOST, -}; - -extern int s5p_usb_phy_init(struct platform_device *pdev, int type); -extern int s5p_usb_phy_exit(struct platform_device *pdev, int type); - -#endif /* __PLAT_S5P_REGS_USB_PHY_H */ diff --git a/arch/arm/plat-samsung/include/plat/camport.h b/arch/arm/plat-samsung/include/plat/camport.h new file mode 100644 index 000000000000..a5708bf84b3a --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/camport.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2011 Samsung Electronics Co., Ltd. + * + * S5P series camera interface helper functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __PLAT_SAMSUNG_CAMPORT_H_ +#define __PLAT_SAMSUNG_CAMPORT_H_ __FILE__ + +enum s5p_camport_id { + S5P_CAMPORT_A, + S5P_CAMPORT_B, +}; + +/* + * The helper functions to configure GPIO for the camera parallel bus. + * The camera port can be multiplexed with any FIMC entity, even multiple + * FIMC entities are allowed to be attached to a single port simultaneously. + * These functions are to be used in the board setup code. + */ +int s5pv210_fimc_setup_gpio(enum s5p_camport_id id); +int exynos4_fimc_setup_gpio(enum s5p_camport_id id); + +#endif /* __PLAT_SAMSUNG_CAMPORT_H */ diff --git a/arch/arm/plat-samsung/include/plat/ehci.h b/arch/arm/plat-samsung/include/plat/ehci.h new file mode 100644 index 000000000000..5f28cae18582 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/ehci.h @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2011 Samsung Electronics Co.Ltd + * Author: Joonyoung Shim + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __PLAT_SAMSUNG_EHCI_H +#define __PLAT_SAMSUNG_EHCI_H __FILE__ + +struct s5p_ehci_platdata { + int (*phy_init)(struct platform_device *pdev, int type); + int (*phy_exit)(struct platform_device *pdev, int type); +}; + +extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd); + +#endif /* __PLAT_SAMSUNG_EHCI_H */ diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h new file mode 100644 index 000000000000..94ecf8c5c857 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/irqs.h @@ -0,0 +1,115 @@ +/* linux/arch/arm/plat-samsung/include/plat/irqs.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P Common IRQ support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __PLAT_SAMSUNG_IRQS_H +#define __PLAT_SAMSUNG_IRQS_H __FILE__ + +/* we keep the first set of CPU IRQs out of the range of + * the ISA space, so that the PC104 has them to itself + * and we don't end up having to do horrible things to the + * standard ISA drivers.... + * + * note, since we're using the VICs, our start must be a + * mulitple of 32 to allow the common code to work + */ + +#define S5P_IRQ_OFFSET (32) + +#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET) + +#define S5P_VIC0_BASE S5P_IRQ(0) +#define S5P_VIC1_BASE S5P_IRQ(32) +#define S5P_VIC2_BASE S5P_IRQ(64) +#define S5P_VIC3_BASE S5P_IRQ(96) + +#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32)) + +#define IRQ_VIC0_BASE S5P_VIC0_BASE +#define IRQ_VIC1_BASE S5P_VIC1_BASE +#define IRQ_VIC2_BASE S5P_VIC2_BASE + +/* UART interrupts, each UART has 4 intterupts per channel so + * use the space between the ISA and S3C main interrupts. Note, these + * are not in the same order as the S3C24XX series! */ + +#define IRQ_S5P_UART_BASE0 (16) +#define IRQ_S5P_UART_BASE1 (20) +#define IRQ_S5P_UART_BASE2 (24) +#define IRQ_S5P_UART_BASE3 (28) + +#define UART_IRQ_RXD (0) +#define UART_IRQ_ERR (1) +#define UART_IRQ_TXD (2) + +#define IRQ_S5P_UART_RX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD) +#define IRQ_S5P_UART_TX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD) +#define IRQ_S5P_UART_ERR0 (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR) + +#define IRQ_S5P_UART_RX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD) +#define IRQ_S5P_UART_TX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD) +#define IRQ_S5P_UART_ERR1 (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR) + +#define IRQ_S5P_UART_RX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD) +#define IRQ_S5P_UART_TX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD) +#define IRQ_S5P_UART_ERR2 (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR) + +#define IRQ_S5P_UART_RX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD) +#define IRQ_S5P_UART_TX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD) +#define IRQ_S5P_UART_ERR3 (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR) + +/* S3C compatibilty defines */ +#define IRQ_S3CUART_RX0 IRQ_S5P_UART_RX0 +#define IRQ_S3CUART_RX1 IRQ_S5P_UART_RX1 +#define IRQ_S3CUART_RX2 IRQ_S5P_UART_RX2 +#define IRQ_S3CUART_RX3 IRQ_S5P_UART_RX3 + +/* VIC based IRQs */ + +#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) +#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x)) +#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) +#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) + +#define S5P_TIMER_IRQ(x) (11 + (x)) + +#define IRQ_TIMER0 S5P_TIMER_IRQ(0) +#define IRQ_TIMER1 S5P_TIMER_IRQ(1) +#define IRQ_TIMER2 S5P_TIMER_IRQ(2) +#define IRQ_TIMER3 S5P_TIMER_IRQ(3) +#define IRQ_TIMER4 S5P_TIMER_IRQ(4) + +#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ + : ((x) - 16 + S5P_EINT_BASE2)) + +#define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \ + ((irq) - S5P_EINT_BASE1) : \ + ((irq) + 16 - S5P_EINT_BASE2)) + +#define IRQ_EINT_BIT(x) EINT_OFFSET(x) + +/* Typically only a few gpio chips require gpio interrupt support. + To avoid memory waste irq descriptors are allocated only for + S5P_GPIOINT_GROUP_COUNT chips, each with total number of + S5P_GPIOINT_GROUP_SIZE pins/irqs. Each GPIOINT group can be assiged + to any gpio chip with the s5p_register_gpio_interrupt() function */ +#define S5P_GPIOINT_GROUP_COUNT 4 +#define S5P_GPIOINT_GROUP_SIZE 8 +#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE) + +/* IRQ types common for all s5p platforms */ +#define S5P_IRQ_TYPE_LEVEL_LOW (0x00) +#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01) +#define S5P_IRQ_TYPE_EDGE_FALLING (0x02) +#define S5P_IRQ_TYPE_EDGE_RISING (0x03) +#define S5P_IRQ_TYPE_EDGE_BOTH (0x04) + +#endif /* __PLAT_SAMSUNG_IRQS_H */ diff --git a/arch/arm/plat-samsung/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h new file mode 100644 index 000000000000..ac13227272f0 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/mfc.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2011 Samsung Electronics Co.Ltd + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __PLAT_SAMSUNG_MFC_H +#define __PLAT_SAMSUNG_MFC_H __FILE__ + +/** + * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver + * @rbase: base address for MFC 'right' memory interface + * @rsize: size of the memory reserved for MFC 'right' interface + * @lbase: base address for MFC 'left' memory interface + * @lsize: size of the memory reserved for MFC 'left' interface + * + * This function reserves system memory for both MFC device memory + * interfaces and registers it to respective struct device entries as + * coherent memory. + */ +void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, + phys_addr_t lbase, unsigned int lsize); + +#endif /* __PLAT_SAMSUNG_MFC_H */ diff --git a/arch/arm/plat-samsung/include/plat/mipi_csis.h b/arch/arm/plat-samsung/include/plat/mipi_csis.h new file mode 100644 index 000000000000..c45b1e8d4c2e --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/mipi_csis.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd. + * + * S5P series MIPI CSI slave device support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __PLAT_SAMSUNG_MIPI_CSIS_H_ +#define __PLAT_SAMSUNG_MIPI_CSIS_H_ __FILE__ + +struct platform_device; + +/** + * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver + * @clk_rate: bus clock frequency + * @lanes: number of data lanes used + * @alignment: data alignment in bits + * @hs_settle: HS-RX settle time + * @fixed_phy_vdd: false to enable external D-PHY regulator management in the + * driver or true in case this regulator has no enable function + * @phy_enable: pointer to a callback controlling D-PHY enable/reset + */ +struct s5p_platform_mipi_csis { + unsigned long clk_rate; + u8 lanes; + u8 alignment; + u8 hs_settle; + bool fixed_phy_vdd; + int (*phy_enable)(struct platform_device *pdev, bool on); +}; + +/** + * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control + * @pdev: MIPI-CSIS platform device + * @on: true to enable D-PHY and deassert its reset + * false to disable D-PHY + */ +int s5p_csis_phy_enable(struct platform_device *pdev, bool on); + +#endif /* __PLAT_SAMSUNG_MIPI_CSIS_H_ */ diff --git a/arch/arm/plat-samsung/include/plat/regs-srom.h b/arch/arm/plat-samsung/include/plat/regs-srom.h new file mode 100644 index 000000000000..9b6729c81cda --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/regs-srom.h @@ -0,0 +1,54 @@ +/* linux/arch/arm/plat-samsung/include/plat/regs-srom.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5P SROMC register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __PLAT_SAMSUNG_REGS_SROM_H +#define __PLAT_SAMSUNG_REGS_SROM_H __FILE__ + +#include + +#define S5P_SROMREG(x) (S5P_VA_SROMC + (x)) + +#define S5P_SROM_BW S5P_SROMREG(0x0) +#define S5P_SROM_BC0 S5P_SROMREG(0x4) +#define S5P_SROM_BC1 S5P_SROMREG(0x8) +#define S5P_SROM_BC2 S5P_SROMREG(0xc) +#define S5P_SROM_BC3 S5P_SROMREG(0x10) +#define S5P_SROM_BC4 S5P_SROMREG(0x14) +#define S5P_SROM_BC5 S5P_SROMREG(0x18) + +/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ + +#define S5P_SROM_BW__DATAWIDTH__SHIFT 0 +#define S5P_SROM_BW__ADDRMODE__SHIFT 1 +#define S5P_SROM_BW__WAITENABLE__SHIFT 2 +#define S5P_SROM_BW__BYTEENABLE__SHIFT 3 + +#define S5P_SROM_BW__CS_MASK 0xf + +#define S5P_SROM_BW__NCS0__SHIFT 0 +#define S5P_SROM_BW__NCS1__SHIFT 4 +#define S5P_SROM_BW__NCS2__SHIFT 8 +#define S5P_SROM_BW__NCS3__SHIFT 12 +#define S5P_SROM_BW__NCS4__SHIFT 16 +#define S5P_SROM_BW__NCS5__SHIFT 20 + +/* applies to same to BCS0 - BCS3 */ + +#define S5P_SROM_BCX__PMC__SHIFT 0 +#define S5P_SROM_BCX__TACP__SHIFT 4 +#define S5P_SROM_BCX__TCAH__SHIFT 8 +#define S5P_SROM_BCX__TCOH__SHIFT 12 +#define S5P_SROM_BCX__TACC__SHIFT 16 +#define S5P_SROM_BCX__TCOS__SHIFT 24 +#define S5P_SROM_BCX__TACS__SHIFT 28 + +#endif /* __PLAT_SAMSUNG_REGS_SROM_H */ diff --git a/arch/arm/plat-samsung/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h new file mode 100644 index 000000000000..32ca5179c6e1 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/reset.h @@ -0,0 +1,16 @@ +/* linux/arch/arm/plat-samsung/include/plat/reset.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __PLAT_SAMSUNG_RESET_H +#define __PLAT_SAMSUNG_RESET_H __FILE__ + +extern void (*s5p_reset_hook)(void); + +#endif /* __PLAT_SAMSUNG_RESET_H */ diff --git a/arch/arm/plat-samsung/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h new file mode 100644 index 000000000000..984bf9e7bc89 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/s5p-clock.h @@ -0,0 +1,55 @@ +/* linux/arch/arm/plat-samsung/include/plat/s5p-clock.h + * + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Header file for s5p clock support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_S5P_CLOCK_H +#define __ASM_PLAT_S5P_CLOCK_H __FILE__ + +#include + +#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) + +#define clk_fin_apll clk_ext_xtal_mux +#define clk_fin_mpll clk_ext_xtal_mux +#define clk_fin_epll clk_ext_xtal_mux +#define clk_fin_dpll clk_ext_xtal_mux +#define clk_fin_vpll clk_ext_xtal_mux +#define clk_fin_hpll clk_ext_xtal_mux + +extern struct clk clk_ext_xtal_mux; +extern struct clk clk_xusbxti; +extern struct clk clk_48m; +extern struct clk s5p_clk_27m; +extern struct clk clk_fout_apll; +extern struct clk clk_fout_mpll; +extern struct clk clk_fout_epll; +extern struct clk clk_fout_dpll; +extern struct clk clk_fout_vpll; +extern struct clk clk_arm; +extern struct clk clk_vpll; + +extern struct clksrc_sources clk_src_apll; +extern struct clksrc_sources clk_src_mpll; +extern struct clksrc_sources clk_src_epll; +extern struct clksrc_sources clk_src_dpll; + +extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); + +/* Common EPLL operations for S5P platform */ +extern int s5p_epll_enable(struct clk *clk, int enable); +extern unsigned long s5p_epll_get_rate(struct clk *clk); + +/* SPDIF clk operations common for S5PC100/V210/C110 and Exynos4 */ +extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate); +extern unsigned long s5p_spdif_get_rate(struct clk *clk); + +extern struct clk_ops s5p_sclk_spdif_ops; +#endif /* __ASM_PLAT_S5P_CLOCK_H */ diff --git a/arch/arm/plat-samsung/include/plat/s5p-time.h b/arch/arm/plat-samsung/include/plat/s5p-time.h new file mode 100644 index 000000000000..3a70aebc9205 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/s5p-time.h @@ -0,0 +1,40 @@ +/* linux/arch/arm/plat-samsung/include/plat/s5p-time.h + * + * Copyright 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Header file for s5p time support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_S5P_TIME_H +#define __ASM_PLAT_S5P_TIME_H __FILE__ + +/* S5P HR-Timer Clock mode */ +enum s5p_timer_mode { + S5P_PWM0, + S5P_PWM1, + S5P_PWM2, + S5P_PWM3, + S5P_PWM4, +}; + +struct s5p_timer_source { + unsigned int event_id; + unsigned int source_id; +}; + +/* Be able to sleep for atleast 4 seconds (usually more) */ +#define S5PTIMER_MIN_RANGE 4 + +#define TCNT_MAX 0xffffffff +#define NON_PERIODIC 0 +#define PERIODIC 1 + +extern void __init s5p_set_timer_source(enum s5p_timer_mode event, + enum s5p_timer_mode source); +extern struct sys_timer s5p_timer; +#endif /* __ASM_PLAT_S5P_TIME_H */ diff --git a/arch/arm/plat-samsung/include/plat/sysmmu.h b/arch/arm/plat-samsung/include/plat/sysmmu.h new file mode 100644 index 000000000000..5fe8ee01a5ba --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/sysmmu.h @@ -0,0 +1,95 @@ +/* linux/arch/arm/plat-samsung/include/plat/sysmmu.h + * + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung System MMU driver for S5P platform + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __PLAT_SAMSUNG_SYSMMU_H +#define __PLAT_SAMSUNG_SYSMMU_H __FILE__ + +enum S5P_SYSMMU_INTERRUPT_TYPE { + SYSMMU_PAGEFAULT, + SYSMMU_AR_MULTIHIT, + SYSMMU_AW_MULTIHIT, + SYSMMU_BUSERROR, + SYSMMU_AR_SECURITY, + SYSMMU_AR_ACCESS, + SYSMMU_AW_SECURITY, + SYSMMU_AW_PROTECTION, /* 7 */ + SYSMMU_FAULTS_NUM +}; + +#ifdef CONFIG_S5P_SYSTEM_MMU + +#include + +/** + * s5p_sysmmu_enable() - enable system mmu of ip + * @ips: The ip connected system mmu. + * #pgd: Base physical address of the 1st level page table + * + * This function enable system mmu to transfer address + * from virtual address to physical address + */ +void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd); + +/** + * s5p_sysmmu_disable() - disable sysmmu mmu of ip + * @ips: The ip connected system mmu. + * + * This function disable system mmu to transfer address + * from virtual address to physical address + */ +void s5p_sysmmu_disable(sysmmu_ips ips); + +/** + * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table + * @ips: The ip connected system mmu. + * @pgd: The page table base address. + * + * This function set page table base address + * When system mmu transfer address from virtaul address to physical address, + * system mmu refer address information from page table + */ +void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd); + +/** + * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu + * @ips: The ip connected system mmu. + * + * This function flush all TLB entry in system mmu + */ +void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips); + +/** s5p_sysmmu_set_fault_handler() - Fault handler for System MMUs + * @itype: type of fault. + * @pgtable_base: the physical address of page table base. This is 0 if @ips is + * SYSMMU_BUSERROR. + * @fault_addr: the device (virtual) address that the System MMU tried to + * translated. This is 0 if @ips is SYSMMU_BUSERROR. + * Called when interrupt occurred by the System MMUs + * The device drivers of peripheral devices that has a System MMU can implement + * a fault handler to resolve address translation fault by System MMU. + * The meanings of return value and parameters are described below. + + * return value: non-zero if the fault is correctly resolved. + * zero if the fault is not handled. + */ +void s5p_sysmmu_set_fault_handler(sysmmu_ips ips, + int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype, + unsigned long pgtable_base, + unsigned long fault_addr)); +#else +#define s5p_sysmmu_enable(ips, pgd) do { } while (0) +#define s5p_sysmmu_disable(ips) do { } while (0) +#define s5p_sysmmu_set_tablebase_pgd(ips, pgd) do { } while (0) +#define s5p_sysmmu_tlb_invalidate(ips) do { } while (0) +#define s5p_sysmmu_set_fault_handler(ips, handler) do { } while (0) +#endif +#endif /* __ASM_PLAT_SYSMMU_H */ diff --git a/arch/arm/plat-samsung/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h new file mode 100644 index 000000000000..a448e990964d --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/system-reset.h @@ -0,0 +1,31 @@ +/* linux/arch/arm/plat-samsung/include/plat/system-reset.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h + * + * S5P - System define for arch_reset() + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include + +void (*s5p_reset_hook)(void); + +static void arch_reset(char mode, const char *cmd) +{ + /* SWRESET support in s5p_reset_hook() */ + + if (s5p_reset_hook) + s5p_reset_hook(); + + /* Perform reset using Watchdog reset + * if there is no s5p_reset_hook() + */ + + arch_wdt_reset(); +} diff --git a/arch/arm/plat-samsung/include/plat/usb-phy.h b/arch/arm/plat-samsung/include/plat/usb-phy.h new file mode 100644 index 000000000000..959bcdb03a25 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/usb-phy.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2011 Samsung Electronics Co.Ltd + * Author: Joonyoung Shim + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __PLAT_SAMSUNG_USB_PHY_H +#define __PLAT_SAMSUNG_USB_PHY_H __FILE__ + +enum s5p_usb_phy_type { + S5P_USB_PHY_DEVICE, + S5P_USB_PHY_HOST, +}; + +extern int s5p_usb_phy_init(struct platform_device *pdev, int type); +extern int s5p_usb_phy_exit(struct platform_device *pdev, int type); + +#endif /* __PLAT_SAMSUNG_USB_PHY_H */