From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Wed, 22 Apr 2015 16:08:39 +0000 (-0700)
Subject: Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=e6c81cce5699ec6be3a7533b5ad7a062ab3357f2;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge tag 'armsoc-soc' of git://git./linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  In this case, that includes:

   - support for the new Annapurna Labs "Alpine" platform

   - a rework greatly simplifying adding new platform support to the
     MCPM subsystem (Multi-cluster power management)

   - cpuidle and PM improvements for Exynos3250

   - misc updates for Renesas, OMAP, Meson, i.MX.  Some of these could
     have gone in other branches but ended up here for various reasons"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
  ARM: alpine: add support for generic pci
  ARM: Exynos: migrate DCSCB to the new MCPM backend abstraction
  ARM: vexpress: migrate DCSCB to the new MCPM backend abstraction
  ARM: vexpress: DCSCB: tighten CPU validity assertion
  ARM: vexpress: migrate TC2 to the new MCPM backend abstraction
  ARM: MCPM: move the algorithmic complexity to the core code
  ARM: EXYNOS: allow cpuidle driver usage on Exynos3250 SoC
  ARM: EXYNOS: add AFTR mode support for Exynos3250
  ARM: EXYNOS: add code for setting/clearing boot flag
  ARM: EXYNOS: fix CPU1 hotplug on Exynos3250
  ARM: S3C64XX: Use fixed IRQ bases to avoid conflicts on Cragganmore
  ARM: cygnus: fix const declaration bcm_cygnus_dt_compat
  ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4
  ARM: DRA7: hwmod: Add data for GPTimers 13 through 16
  ARM: EXYNOS: Remove left over 'extra_save'
  ARM: EXYNOS: Constify exynos_pm_data array
  ARM: EXYNOS: use static in suspend.c
  ARM: EXYNOS: Use platform device name as power domain name
  ARM: EXYNOS: add support for async-bridge clocks for pm_domains
  ARM: omap-device: add missed callback for suspend-to-disk
  ...
---

e6c81cce5699ec6be3a7533b5ad7a062ab3357f2
diff --cc arch/arm/mach-exynos/platsmp.c
index d2e9f12d12f1,511b81ac2a18..ebd135bb0995
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@@ -126,7 -126,10 +126,9 @@@ static inline void platform_do_lowpower
   */
  void exynos_cpu_power_down(int cpu)
  {
+ 	u32 core_conf;
+ 
 -	if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") ||
 -		of_machine_is_compatible("samsung,exynos5800"))) {
 +	if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
  		/*
  		 * Bypass power down for CPU0 during suspend. Check for
  		 * the SYS_PWR_REG value to decide if we are suspending
diff --cc arch/arm/mach-exynos/suspend.c
index 2146d918aedd,89a6d3fb3284..3e6aea7f83af
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@@ -732,11 -612,10 +722,11 @@@ void __init exynos_pm_init(void
  		pr_err("Failed to find PMU node\n");
  		return;
  	}
 -	pm_data = (const struct exynos_pm_data *) match->data;
  
 -	/* Platform-specific GIC callback */
 -	gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
 +	if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL)))
 +		pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
 +
- 	pm_data = (struct exynos_pm_data *) match->data;
++	pm_data = (const struct exynos_pm_data *) match->data;
  
  	/* All wakeup disable */
  	tmp = pmu_raw_readl(S5P_WAKEUP_MASK);
diff --cc arch/arm/mach-imx/Kconfig
index 0748747b2bc6,bf42a6a86bed..3a3d3e9d7bfd
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@@ -586,9 -636,10 +588,10 @@@ config SOC_VF61
  	select ARM_GIC
  	select PINCTRL_VF610
  	select PL310_ERRATA_769419 if CACHE_L2X0
+ 	select SMP_ON_UP if SMP
  
  	help
 -	  This enable support for Freescale Vybrid VF610 processor.
 +	  This enables support for Freescale Vybrid VF610 processor.
  
  choice
  	prompt "Clocksource for scheduler clock"