From: Ville Syrjälä Date: Fri, 5 Jul 2013 08:57:22 +0000 (+0300) Subject: drm/i915: Don't multiply the watermark latency values too early X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=e5d5019e95415a99b1c0bca3dab6d8fcd39f4c65;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: Don't multiply the watermark latency values too early The LP1+ watermark latency values need to be multiplied by 5 to make them suitable for watermark calculations. However on pre-HSW platforms we're going to need the raw value later when we have to write it to the WM_LPn registers' latency field. So delay the multiplication until it's needed. Note: Paulo complains that the units of wm (now in 100ns) aren't really clear and I agree. But that can be fixed later on ... Signed-off-by: Ville Syrjälä Reviewed-by: Paulo Zanoni [danvet: Add a comment about the unit obfuscation.] Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b8ec1433531d..b6430bacc7dc 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2361,10 +2361,10 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5]) wm[0] = (sskpd >> 56) & 0xFF; if (wm[0] == 0) wm[0] = sskpd & 0xF; - wm[1] = ((sskpd >> 4) & 0xFF) * 5; - wm[2] = ((sskpd >> 12) & 0xFF) * 5; - wm[3] = ((sskpd >> 20) & 0x1FF) * 5; - wm[4] = ((sskpd >> 32) & 0x1FF) * 5; + wm[1] = (sskpd >> 4) & 0xFF; + wm[2] = (sskpd >> 12) & 0xFF; + wm[3] = (sskpd >> 20) & 0x1FF; + wm[4] = (sskpd >> 32) & 0x1FF; } } @@ -2442,7 +2442,7 @@ static void hsw_compute_wm_results(struct drm_device *dev, int level, max_level, wm_lp; for (level = 1; level <= 4; level++) - if (!hsw_compute_lp_wm(wm[level], lp_maximums, params, + if (!hsw_compute_lp_wm(wm[level] * 5, lp_maximums, params, &lp_results[level - 1])) break; max_level = level - 1;