From: Aaron Wu Date: Tue, 10 Feb 2015 09:40:34 +0000 (+0800) Subject: bfin_can: rewrite the blackfin style of read/write to common ones X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=e4936e01d0fe5204879c3eb1d4897372ba3b56c5;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git bfin_can: rewrite the blackfin style of read/write to common ones Replace the blackfin arch dependent style of bfin_read/bfin_write with common readw/writew Signed-off-by: Aaron Wu Signed-off-by: Marc Kleine-Budde --- diff --git a/drivers/net/can/bfin_can.c b/drivers/net/can/bfin_can.c index e7a6363e736b..9cbf615e5673 100644 --- a/drivers/net/can/bfin_can.c +++ b/drivers/net/can/bfin_can.c @@ -78,8 +78,8 @@ static int bfin_can_set_bittiming(struct net_device *dev) if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) timing |= SAM; - bfin_write(®->clock, clk); - bfin_write(®->timing, timing); + writew(clk, ®->clock); + writew(timing, ®->timing); netdev_info(dev, "setting CLOCK=0x%04x TIMING=0x%04x\n", clk, timing); @@ -94,16 +94,14 @@ static void bfin_can_set_reset_mode(struct net_device *dev) int i; /* disable interrupts */ - bfin_write(®->mbim1, 0); - bfin_write(®->mbim2, 0); - bfin_write(®->gim, 0); + writew(0, ®->mbim1); + writew(0, ®->mbim2); + writew(0, ®->gim); /* reset can and enter configuration mode */ - bfin_write(®->control, SRS | CCR); - SSYNC(); - bfin_write(®->control, CCR); - SSYNC(); - while (!(bfin_read(®->control) & CCA)) { + writew(SRS | CCR, ®->control); + writew(CCR, ®->control); + while (!(readw(®->control) & CCA)) { udelay(10); if (--timeout == 0) { netdev_err(dev, "fail to enter configuration mode\n"); @@ -116,34 +114,33 @@ static void bfin_can_set_reset_mode(struct net_device *dev) * by writing to CAN Mailbox Configuration Registers 1 and 2 * For all bits: 0 - Mailbox disabled, 1 - Mailbox enabled */ - bfin_write(®->mc1, 0); - bfin_write(®->mc2, 0); + writew(0, ®->mc1); + writew(0, ®->mc2); /* Set Mailbox Direction */ - bfin_write(®->md1, 0xFFFF); /* mailbox 1-16 are RX */ - bfin_write(®->md2, 0); /* mailbox 17-32 are TX */ + writew(0xFFFF, ®->md1); /* mailbox 1-16 are RX */ + writew(0, ®->md2); /* mailbox 17-32 are TX */ /* RECEIVE_STD_CHL */ for (i = 0; i < 2; i++) { - bfin_write(®->chl[RECEIVE_STD_CHL + i].id0, 0); - bfin_write(®->chl[RECEIVE_STD_CHL + i].id1, AME); - bfin_write(®->chl[RECEIVE_STD_CHL + i].dlc, 0); - bfin_write(®->msk[RECEIVE_STD_CHL + i].amh, 0x1FFF); - bfin_write(®->msk[RECEIVE_STD_CHL + i].aml, 0xFFFF); + writew(0, ®->chl[RECEIVE_STD_CHL + i].id0); + writew(AME, ®->chl[RECEIVE_STD_CHL + i].id1); + writew(0, ®->chl[RECEIVE_STD_CHL + i].dlc); + writew(0x1FFF, ®->msk[RECEIVE_STD_CHL + i].amh); + writew(0xFFFF, ®->msk[RECEIVE_STD_CHL + i].aml); } /* RECEIVE_EXT_CHL */ for (i = 0; i < 2; i++) { - bfin_write(®->chl[RECEIVE_EXT_CHL + i].id0, 0); - bfin_write(®->chl[RECEIVE_EXT_CHL + i].id1, AME | IDE); - bfin_write(®->chl[RECEIVE_EXT_CHL + i].dlc, 0); - bfin_write(®->msk[RECEIVE_EXT_CHL + i].amh, 0x1FFF); - bfin_write(®->msk[RECEIVE_EXT_CHL + i].aml, 0xFFFF); + writew(0, ®->chl[RECEIVE_EXT_CHL + i].id0); + writew(AME | IDE, ®->chl[RECEIVE_EXT_CHL + i].id1); + writew(0, ®->chl[RECEIVE_EXT_CHL + i].dlc); + writew(0x1FFF, ®->msk[RECEIVE_EXT_CHL + i].amh); + writew(0xFFFF, ®->msk[RECEIVE_EXT_CHL + i].aml); } - bfin_write(®->mc2, BIT(TRANSMIT_CHL - 16)); - bfin_write(®->mc1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL)); - SSYNC(); + writew(BIT(TRANSMIT_CHL - 16), ®->mc2); + writew(BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL), ®->mc1); priv->can.state = CAN_STATE_STOPPED; } @@ -157,9 +154,9 @@ static void bfin_can_set_normal_mode(struct net_device *dev) /* * leave configuration mode */ - bfin_write(®->control, bfin_read(®->control) & ~CCR); + writew(readw(®->control) & ~CCR, ®->control); - while (bfin_read(®->status) & CCA) { + while (readw(®->status) & CCA) { udelay(10); if (--timeout == 0) { netdev_err(dev, "fail to leave configuration mode\n"); @@ -170,26 +167,25 @@ static void bfin_can_set_normal_mode(struct net_device *dev) /* * clear _All_ tx and rx interrupts */ - bfin_write(®->mbtif1, 0xFFFF); - bfin_write(®->mbtif2, 0xFFFF); - bfin_write(®->mbrif1, 0xFFFF); - bfin_write(®->mbrif2, 0xFFFF); + writew(0xFFFF, ®->mbtif1); + writew(0xFFFF, ®->mbtif2); + writew(0xFFFF, ®->mbrif1); + writew(0xFFFF, ®->mbrif2); /* * clear global interrupt status register */ - bfin_write(®->gis, 0x7FF); /* overwrites with '1' */ + writew(0x7FF, ®->gis); /* overwrites with '1' */ /* * Initialize Interrupts * - set bits in the mailbox interrupt mask register * - global interrupt mask */ - bfin_write(®->mbim1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL)); - bfin_write(®->mbim2, BIT(TRANSMIT_CHL - 16)); + writew(BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL), ®->mbim1); + writew(BIT(TRANSMIT_CHL - 16), ®->mbim2); - bfin_write(®->gim, EPIM | BOIM | RMLIM); - SSYNC(); + writew(EPIM | BOIM | RMLIM, ®->gim); } static void bfin_can_start(struct net_device *dev) @@ -226,7 +222,7 @@ static int bfin_can_get_berr_counter(const struct net_device *dev, struct bfin_can_priv *priv = netdev_priv(dev); struct bfin_can_regs __iomem *reg = priv->membase; - u16 cec = bfin_read(®->cec); + u16 cec = readw(®->cec); bec->txerr = cec >> 8; bec->rxerr = cec; @@ -252,28 +248,28 @@ static int bfin_can_start_xmit(struct sk_buff *skb, struct net_device *dev) /* fill id */ if (id & CAN_EFF_FLAG) { - bfin_write(®->chl[TRANSMIT_CHL].id0, id); + writew(id, ®->chl[TRANSMIT_CHL].id0); val = ((id & 0x1FFF0000) >> 16) | IDE; } else val = (id << 2); if (id & CAN_RTR_FLAG) val |= RTR; - bfin_write(®->chl[TRANSMIT_CHL].id1, val | AME); + writew(val | AME, ®->chl[TRANSMIT_CHL].id1); /* fill payload */ for (i = 0; i < 8; i += 2) { val = ((7 - i) < dlc ? (data[7 - i]) : 0) + ((6 - i) < dlc ? (data[6 - i] << 8) : 0); - bfin_write(®->chl[TRANSMIT_CHL].data[i], val); + writew(val, ®->chl[TRANSMIT_CHL].data[i]); } /* fill data length code */ - bfin_write(®->chl[TRANSMIT_CHL].dlc, dlc); + writew(dlc, ®->chl[TRANSMIT_CHL].dlc); can_put_echo_skb(skb, dev, 0); /* set transmit request */ - bfin_write(®->trs2, BIT(TRANSMIT_CHL - 16)); + writew(BIT(TRANSMIT_CHL - 16), ®->trs2); return 0; } @@ -296,26 +292,26 @@ static void bfin_can_rx(struct net_device *dev, u16 isrc) /* get id */ if (isrc & BIT(RECEIVE_EXT_CHL)) { /* extended frame format (EFF) */ - cf->can_id = ((bfin_read(®->chl[RECEIVE_EXT_CHL].id1) + cf->can_id = ((readw(®->chl[RECEIVE_EXT_CHL].id1) & 0x1FFF) << 16) - + bfin_read(®->chl[RECEIVE_EXT_CHL].id0); + + readw(®->chl[RECEIVE_EXT_CHL].id0); cf->can_id |= CAN_EFF_FLAG; obj = RECEIVE_EXT_CHL; } else { /* standard frame format (SFF) */ - cf->can_id = (bfin_read(®->chl[RECEIVE_STD_CHL].id1) + cf->can_id = (readw(®->chl[RECEIVE_STD_CHL].id1) & 0x1ffc) >> 2; obj = RECEIVE_STD_CHL; } - if (bfin_read(®->chl[obj].id1) & RTR) + if (readw(®->chl[obj].id1) & RTR) cf->can_id |= CAN_RTR_FLAG; /* get data length code */ - cf->can_dlc = get_can_dlc(bfin_read(®->chl[obj].dlc) & 0xF); + cf->can_dlc = get_can_dlc(readw(®->chl[obj].dlc) & 0xF); /* get payload */ for (i = 0; i < 8; i += 2) { - val = bfin_read(®->chl[obj].data[i]); + val = readw(®->chl[obj].data[i]); cf->data[7 - i] = (7 - i) < cf->can_dlc ? val : 0; cf->data[6 - i] = (6 - i) < cf->can_dlc ? (val >> 8) : 0; } @@ -369,7 +365,7 @@ static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status) if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING || state == CAN_STATE_ERROR_PASSIVE)) { - u16 cec = bfin_read(®->cec); + u16 cec = readw(®->cec); u8 rxerr = cec; u8 txerr = cec >> 8; @@ -420,23 +416,23 @@ static irqreturn_t bfin_can_interrupt(int irq, void *dev_id) struct net_device_stats *stats = &dev->stats; u16 status, isrc; - if ((irq == priv->tx_irq) && bfin_read(®->mbtif2)) { + if ((irq == priv->tx_irq) && readw(®->mbtif2)) { /* transmission complete interrupt */ - bfin_write(®->mbtif2, 0xFFFF); + writew(0xFFFF, ®->mbtif2); stats->tx_packets++; - stats->tx_bytes += bfin_read(®->chl[TRANSMIT_CHL].dlc); + stats->tx_bytes += readw(®->chl[TRANSMIT_CHL].dlc); can_get_echo_skb(dev, 0); netif_wake_queue(dev); - } else if ((irq == priv->rx_irq) && bfin_read(®->mbrif1)) { + } else if ((irq == priv->rx_irq) && readw(®->mbrif1)) { /* receive interrupt */ - isrc = bfin_read(®->mbrif1); - bfin_write(®->mbrif1, 0xFFFF); + isrc = readw(®->mbrif1); + writew(0xFFFF, ®->mbrif1); bfin_can_rx(dev, isrc); - } else if ((irq == priv->err_irq) && bfin_read(®->gis)) { + } else if ((irq == priv->err_irq) && readw(®->gis)) { /* error interrupt */ - isrc = bfin_read(®->gis); - status = bfin_read(®->esr); - bfin_write(®->gis, 0x7FF); + isrc = readw(®->gis); + status = readw(®->esr); + writew(0x7FF, ®->gis); bfin_can_err(dev, isrc, status); } else { return IRQ_NONE; @@ -641,9 +637,8 @@ static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg) if (netif_running(dev)) { /* enter sleep mode */ - bfin_write(®->control, bfin_read(®->control) | SMR); - SSYNC(); - while (!(bfin_read(®->intr) & SMACK)) { + writew(readw(®->control) | SMR, ®->control); + while (!(readw(®->intr) & SMACK)) { udelay(10); if (--timeout == 0) { netdev_err(dev, "fail to enter sleep mode\n"); @@ -663,8 +658,7 @@ static int bfin_can_resume(struct platform_device *pdev) if (netif_running(dev)) { /* leave sleep mode */ - bfin_write(®->intr, 0); - SSYNC(); + writew(0, ®->intr); } return 0;