From: Ayoung Sim Date: Tue, 15 May 2018 06:33:31 +0000 (+0900) Subject: [COMMON] media: mfc: change the default 10bit format X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=e3c02b95dbe0cac5cd14b90149b1ff3212d9c9b0;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [COMMON] media: mfc: change the default 10bit format Default 10bit format is changed to P010 format and default MEM_TYPE_10B is changed too, because P010 format should set the MEM_TYPE_10B to 1. Also, MEM_TYPE_10B should be set when SEQ_START. Change-Id: I1c4d9748b1681dd485550a49614b772e0802a783 Signed-off-by: Ayoung Sim --- diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_cmd.c b/drivers/media/platform/exynos/mfc/s5p_mfc_cmd.c index 33ba1b88a24a..d8cc47840c85 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_cmd.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_cmd.c @@ -153,7 +153,7 @@ int s5p_mfc_cmd_dec_init_buffers(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev; struct s5p_mfc_dec *dec; - unsigned int reg = 0, pix_val, mem_type = 0; + unsigned int reg = 0, pix_val; int ret; if (!ctx) { @@ -166,61 +166,44 @@ int s5p_mfc_cmd_dec_init_buffers(struct s5p_mfc_ctx *ctx) mfc_err_ctx("no mfc device to run\n"); return -EINVAL; } - /* Initializing decoding - parsing header */ - /* Header was parsed now starting processing - * First set the output frame buffers - * s5p_mfc_alloc_dec_buffers(ctx); */ switch (ctx->dst_fmt->fourcc) { case V4L2_PIX_FMT_NV12M: case V4L2_PIX_FMT_NV12N: case V4L2_PIX_FMT_NV12MT_16X16: case V4L2_PIX_FMT_NV16M: - pix_val = 0; - break; - case V4L2_PIX_FMT_NV21M: - case V4L2_PIX_FMT_NV61M: - pix_val = 1; - break; - case V4L2_PIX_FMT_YVU420M: - pix_val = 2; - break; - case V4L2_PIX_FMT_YUV420M: - case V4L2_PIX_FMT_YUV420N: - pix_val = 3; - break; - /* 10bit */ case V4L2_PIX_FMT_NV12N_10B: case V4L2_PIX_FMT_NV12M_S10B: case V4L2_PIX_FMT_NV16M_S10B: - mem_type = 0; - pix_val = 0; - break; case V4L2_PIX_FMT_NV12M_P010: case V4L2_PIX_FMT_NV16M_P210: - mem_type = 1; pix_val = 0; break; + case V4L2_PIX_FMT_NV21M: + case V4L2_PIX_FMT_NV61M: case V4L2_PIX_FMT_NV21M_S10B: case V4L2_PIX_FMT_NV61M_S10B: - mem_type = 0; - pix_val = 1; - break; case V4L2_PIX_FMT_NV21M_P010: case V4L2_PIX_FMT_NV61M_P210: - mem_type = 1; pix_val = 1; break; + case V4L2_PIX_FMT_YVU420M: + pix_val = 2; + break; + case V4L2_PIX_FMT_YUV420M: + case V4L2_PIX_FMT_YUV420N: + pix_val = 3; + break; default: pix_val = 0; break; } - reg = 0; - reg |= pix_val; - reg |= (mem_type << 4); + reg = MFC_READL(S5P_FIMV_PIXEL_FORMAT); + reg &= ~(0xF); + reg |= pix_val & 0xF; MFC_WRITEL(reg, S5P_FIMV_PIXEL_FORMAT); - mfc_debug(2, "pixel format: %d, mem_type for 10bit: %d (reg: %#x)\n", - pix_val, mem_type, reg); + mfc_debug(2, "pixel format: %d, mem_type_10bit should be fixed on SEQ_START(reg: %#x)\n", + pix_val, reg); s5p_mfc_clean_ctx_int_flags(ctx); ret = s5p_mfc_set_dec_codec_buffers(ctx); diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_dec.c b/drivers/media/platform/exynos/mfc/s5p_mfc_dec.c index 8de947ab5470..2f5048b4cf20 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_dec.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_dec.c @@ -188,7 +188,7 @@ static void mfc_dec_change_format(struct s5p_mfc_ctx *ctx) case V4L2_PIX_FMT_NV16M: case V4L2_PIX_FMT_NV16M_S10B: case V4L2_PIX_FMT_NV16M_P210: - ctx->dst_fmt = (struct s5p_mfc_fmt *)&dec_formats[7]; + ctx->dst_fmt = (struct s5p_mfc_fmt *)&dec_formats[9]; break; case V4L2_PIX_FMT_NV21M: case V4L2_PIX_FMT_NV61M: @@ -197,7 +197,7 @@ static void mfc_dec_change_format(struct s5p_mfc_ctx *ctx) ctx->dst_fmt = (struct s5p_mfc_fmt *)&dec_formats[11]; break; default: - ctx->dst_fmt = (struct s5p_mfc_fmt *)&dec_formats[7]; + ctx->dst_fmt = (struct s5p_mfc_fmt *)&dec_formats[9]; break; } } diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_reg.c b/drivers/media/platform/exynos/mfc/s5p_mfc_reg.c index e4af9d98922a..09ad25ffca01 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_reg.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_reg.c @@ -495,7 +495,7 @@ int s5p_mfc_set_dynamic_dpb(struct s5p_mfc_ctx *ctx, struct s5p_mfc_buf *dst_mb) void s5p_mfc_set_pixel_format(struct s5p_mfc_dev *dev, unsigned int format) { unsigned int reg = 0; - unsigned int pix_val, mem_type = 0; + unsigned int pix_val, mem_type_10bit = 1; switch (format) { case V4L2_PIX_FMT_NV12M: @@ -515,26 +515,24 @@ void s5p_mfc_set_pixel_format(struct s5p_mfc_dev *dev, unsigned int format) case V4L2_PIX_FMT_YUV420N: pix_val = 3; break; - /* 10bit */ + /* For 10bit direct set */ case V4L2_PIX_FMT_NV12N_10B: case V4L2_PIX_FMT_NV12M_S10B: case V4L2_PIX_FMT_NV16M_S10B: - mem_type = 0; + mem_type_10bit = 0; pix_val = 0; break; case V4L2_PIX_FMT_NV12M_P010: case V4L2_PIX_FMT_NV16M_P210: - mem_type = 1; pix_val = 0; break; case V4L2_PIX_FMT_NV21M_S10B: case V4L2_PIX_FMT_NV61M_S10B: - mem_type = 0; + mem_type_10bit = 0; pix_val = 1; break; case V4L2_PIX_FMT_NV21M_P010: case V4L2_PIX_FMT_NV61M_P210: - mem_type = 1; pix_val = 1; break; default: @@ -542,8 +540,8 @@ void s5p_mfc_set_pixel_format(struct s5p_mfc_dev *dev, unsigned int format) break; } reg |= pix_val; - reg |= (mem_type << 4); + reg |= (mem_type_10bit << 4); MFC_WRITEL(reg, S5P_FIMV_PIXEL_FORMAT); - mfc_debug(2, "pixel format: %d, mem_type for 10bit: %d (reg: %#x)\n", - pix_val, mem_type, reg); + mfc_debug(2, "pixel format: %d, mem_type_10bit for 10bit: %d (reg: %#x)\n", + pix_val, mem_type_10bit, reg); }