From: H Hartley Sweeten Date: Thu, 19 Dec 2013 23:31:35 +0000 (-0700) Subject: staging: comedi: ni_tio_internal.h: replace NITIO_Gi_Command_Reg() X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=e25ef744460ca114c9f4cd5178932135c760f456;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git staging: comedi: ni_tio_internal.h: replace NITIO_Gi_Command_Reg() The "Command" registers are sequential in the enum ni_gpct_register. Replace this inline CamelCase function with a simple define. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/drivers/ni_tio.c b/drivers/staging/comedi/drivers/ni_tio.c index 6fa72f00360a..d535bbbb15f5 100644 --- a/drivers/staging/comedi/drivers/ni_tio.c +++ b/drivers/staging/comedi/drivers/ni_tio.c @@ -378,7 +378,7 @@ void ni_tio_init_counter(struct ni_gpct *counter) counter_dev-> regs[NITIO_AUTO_INC_REG(counter->counter_index)], NITIO_AUTO_INC_REG(counter->counter_index)); - ni_tio_set_bits(counter, NITIO_Gi_Command_Reg(counter->counter_index), + ni_tio_set_bits(counter, NITIO_CMD_REG(counter->counter_index), ~0, Gi_Synchronize_Gate_Bit); ni_tio_set_bits(counter, NITIO_Gi_Mode_Reg(counter->counter_index), ~0, 0); @@ -523,7 +523,7 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode) ni_tio_set_sync_mode(counter, 0); } - ni_tio_set_bits(counter, NITIO_Gi_Command_Reg(counter->counter_index), + ni_tio_set_bits(counter, NITIO_CMD_REG(counter->counter_index), Gi_Up_Down_Mask, (mode >> NI_GPCT_COUNTING_DIRECTION_SHIFT) << Gi_Up_Down_Shift); @@ -593,7 +593,7 @@ int ni_tio_arm(struct ni_gpct *counter, int arm, unsigned start_trigger) command_transient_bits |= Gi_Disarm_Bit; } ni_tio_set_bits_transient(counter, - NITIO_Gi_Command_Reg(counter->counter_index), + NITIO_CMD_REG(counter->counter_index), 0, 0, command_transient_bits); return 0; } @@ -1636,10 +1636,10 @@ int ni_tio_rinsn(struct ni_gpct *counter, struct comedi_insn *insn, switch (channel) { case 0: ni_tio_set_bits(counter, - NITIO_Gi_Command_Reg(counter->counter_index), + NITIO_CMD_REG(counter->counter_index), Gi_Save_Trace_Bit, 0); ni_tio_set_bits(counter, - NITIO_Gi_Command_Reg(counter->counter_index), + NITIO_CMD_REG(counter->counter_index), Gi_Save_Trace_Bit, Gi_Save_Trace_Bit); /* The count doesn't get latched until the next clock edge, so it is possible the count may change (once) while we are reading. Since the read of the SW_Save_Reg isn't @@ -1705,8 +1705,7 @@ int ni_tio_winsn(struct ni_gpct *counter, struct comedi_insn *insn, load_reg = ni_tio_next_load_register(counter); write_register(counter, data[0], load_reg); ni_tio_set_bits_transient(counter, - NITIO_Gi_Command_Reg(counter-> - counter_index), + NITIO_CMD_REG(counter->counter_index), 0, 0, Gi_Load_Bit); /* restore state of load reg to whatever the user set last set it to */ write_register(counter, counter_dev->regs[load_reg], load_reg); diff --git a/drivers/staging/comedi/drivers/ni_tio_internal.h b/drivers/staging/comedi/drivers/ni_tio_internal.h index 5d3899fb17eb..9587b877c116 100644 --- a/drivers/staging/comedi/drivers/ni_tio_internal.h +++ b/drivers/staging/comedi/drivers/ni_tio_internal.h @@ -22,21 +22,7 @@ #include "ni_tio.h" #define NITIO_AUTO_INC_REG(x) (NITIO_G0_AUTO_INC + (x)) - -static inline enum ni_gpct_register NITIO_Gi_Command_Reg(unsigned idx) -{ - switch (idx) { - case 0: - return NITIO_G0_CMD; - case 1: - return NITIO_G1_CMD; - case 2: - return NITIO_G2_CMD; - case 3: - return NITIO_G3_CMD; - } - return 0; -} +#define NITIO_CMD_REG(x) (NITIO_G0_CMD + (x)) static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx) { diff --git a/drivers/staging/comedi/drivers/ni_tiocmd.c b/drivers/staging/comedi/drivers/ni_tiocmd.c index 45691efefd05..4fb4df09dd33 100644 --- a/drivers/staging/comedi/drivers/ni_tiocmd.c +++ b/drivers/staging/comedi/drivers/ni_tiocmd.c @@ -140,7 +140,7 @@ static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async) BUG(); break; } - ni_tio_set_bits(counter, NITIO_Gi_Command_Reg(counter->counter_index), + ni_tio_set_bits(counter, NITIO_CMD_REG(counter->counter_index), Gi_Save_Trace_Bit, 0); ni_tio_configure_dma(counter, 1, 1); switch (cmd->start_src) {