From: Vince Hsu Date: Tue, 29 Sep 2015 09:58:51 +0000 (+0200) Subject: memory/tegra: Add number of TLB lines for Tegra124 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=e2127ae7a5e80eb53ad431c39145767391da40cd;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git memory/tegra: Add number of TLB lines for Tegra124 Tegra124 was accidentally left out when the number of TLB lines was parameterized in commit 11cec15bf3fb ("iommu/tegra-smmu: Parameterize number of TLB lines"). Fortunately this doesn't cause any noticeable regressions upstream, presumably because there aren't any use-cases that exercise enough pressure on the SMMU. But it is a regression nonetheless, so let's fix it. Fixes: 11cec15bf3fb ("iommu/tegra-smmu: Parameterize number of TLB lines") Signed-off-by: Vince Hsu Signed-off-by: Tomasz Figa [treding@nvidia.com: extract from unrelated patch] Signed-off-by: Thierry Reding --- diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra124.c index 21e7255e3d96..5a58e440f4a7 100644 --- a/drivers/memory/tegra/tegra124.c +++ b/drivers/memory/tegra/tegra124.c @@ -1007,6 +1007,7 @@ static const struct tegra_smmu_soc tegra124_smmu_soc = { .num_swgroups = ARRAY_SIZE(tegra124_swgroups), .supports_round_robin_arbitration = true, .supports_request_limit = true, + .num_tlb_lines = 32, .num_asids = 128, };