From: Chris Metcalf Date: Mon, 7 Nov 2016 19:32:02 +0000 (-0500) Subject: tile: handle __ro_after_init like parisc does X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=e123386bc31bbf467dc558f2f919de0b8b4ba58c;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git tile: handle __ro_after_init like parisc does The tile architecture already marks RO_DATA as read-only in the kernel, so grouping RO_AFTER_INIT_DATA with RO_DATA, as is done by default, means the kernel faults in init when it tries to write to RO_AFTER_INIT_DATA. For now, just arrange that __ro_after_init is handled like __write_once, i.e. __read_mostly. Reviewed-by: Kees Cook Signed-off-by: Chris Metcalf --- diff --git a/arch/tile/include/asm/cache.h b/arch/tile/include/asm/cache.h index 6160761d5f61..4810e48dbbbf 100644 --- a/arch/tile/include/asm/cache.h +++ b/arch/tile/include/asm/cache.h @@ -61,4 +61,7 @@ */ #define __write_once __read_mostly +/* __ro_after_init is the generic name for the tile arch __write_once. */ +#define __ro_after_init __read_mostly + #endif /* _ASM_TILE_CACHE_H */