From: Mark Brown <broonie@opensource.wolfsonmicro.com>
Date: Sun, 2 Dec 2012 12:50:46 +0000 (+0900)
Subject: ASoC: adsp: Set DSP clock rate to SYSCLK rate
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=dd49e2c8b9f18bd4f2848a9d558da08db3966319;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

ASoC: adsp: Set DSP clock rate to SYSCLK rate

For simplicity always run the DSP at the SYSCLK rate.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---

diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c
index 3a8d75bfb0b1..dcf14c38e67e 100644
--- a/sound/soc/codecs/wm_adsp.c
+++ b/sound/soc/codecs/wm_adsp.c
@@ -544,6 +544,28 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w,
 
 	switch (event) {
 	case SND_SOC_DAPM_POST_PMU:
+		/*
+		 * For simplicity set the DSP clock rate to be the
+		 * SYSCLK rate rather than making it configurable.
+		 */
+		ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);
+		if (ret != 0) {
+			adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
+				 ret);
+			return ret;
+		}
+		val = (val & ARIZONA_SYSCLK_FREQ_MASK)
+			>> ARIZONA_SYSCLK_FREQ_SHIFT;
+
+		ret = regmap_update_bits(dsp->regmap,
+					 dsp->base + ADSP2_CLOCKING,
+					 ADSP2_CLK_SEL_MASK, val);
+		if (ret != 0) {
+			adsp_err(dsp, "Failed to set clock rate: %d\n",
+				 ret);
+			return ret;
+		}
+
 		if (dsp->dvfs) {
 			ret = regmap_read(dsp->regmap,
 					  dsp->base + ADSP2_CLOCKING, &val);