From: Ralf Baechle <ralf@linux-mips.org>
Date: Wed, 1 Aug 2007 18:42:37 +0000 (+0100)
Subject: [MIPS] SMTC: Fix secondary VPE interrupt mask initialization.
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=dc0366bf3cd35e4be89f715ff834a06c590fff7a;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git

[MIPS] SMTC: Fix secondary VPE interrupt mask initialization.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c
index 0fb4c269901c..ea8f3bb8ed81 100644
--- a/arch/mips/mips-boards/malta/malta_smtc.c
+++ b/arch/mips/mips-boards/malta/malta_smtc.c
@@ -42,10 +42,11 @@ void prom_init_secondary(void)
 	myvpe = read_c0_tcbind() & TCBIND_CURVPE;
 	if (myvpe != 0) {
 		/* Ideally, this should be done only once per VPE, but... */
-		clear_c0_status(STATUSF_IP2);
-		set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3
-				| STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6
-				| STATUSF_IP7);
+		clear_c0_status(ST0_IM);
+		set_c0_status((0x100 << cp0_compare_irq)
+				| (0x100 << MIPS_CPU_IPI_IRQ));
+		if (cp0_perfcount_irq >= 0)
+			set_c0_status(0x100 << cp0_perfcount_irq);
 	}
 
         smtc_init_secondary();