From: Bernd Schmidt Date: Tue, 22 Apr 2008 23:11:55 +0000 (+0800) Subject: [Blackfin] arch: fix up - CONFIG_BLKFIN_WT was renamed CONFIG_BFIN_WT while the MPU... X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=dbfe44f02b6855efb5a596e942ec2fd96d592f60;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [Blackfin] arch: fix up - CONFIG_BLKFIN_WT was renamed CONFIG_BFIN_WT while the MPU code was out-of-tree. Signed-off-by: Bernd Schmidt Signed-off-by: Bryan Wu --- diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index dc6e8a7a8bda..7310e5fc6399 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c @@ -49,7 +49,7 @@ void __init generate_cpl_tables(void) #ifdef CONFIG_BFIN_DCACHE d_cache = CPLB_L1_CHBL; -#ifdef CONFIG_BLKFIN_WT +#ifdef CONFIG_BFIN_WT d_cache |= CPLB_L1_AOW | CPLB_WT; #endif #endif diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c index c426a22f9907..0a30d6256073 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c @@ -149,7 +149,7 @@ static noinline int dcplb_miss(void) d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; #ifdef CONFIG_BFIN_DCACHE d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; -#ifdef CONFIG_BLKFIN_WT +#ifdef CONFIG_BFIN_WT d_data |= CPLB_L1_AOW | CPLB_WT; #endif #endif @@ -319,7 +319,7 @@ void set_mask_dcplbs(unsigned long *masks) d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; #ifdef CONFIG_BFIN_DCACHE d_data |= CPLB_L1_CHBL; -#ifdef CONFIG_BLKFIN_WT +#ifdef CONFIG_BFIN_WT d_data |= CPLB_L1_AOW | CPLB_WT; #endif #endif