From: Max Filippov <jcmvbkbc@gmail.com>
Date: Thu, 4 Jun 2015 10:41:27 +0000 (+0300)
Subject: xtensa: select PERF_USE_VMALLOC for cache-aliasing configurations
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=db8165f5d975533880f516fed142364ba3e6046e;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

xtensa: select PERF_USE_VMALLOC for cache-aliasing configurations

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---

diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 14a03fe628c7..66e4043659fe 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -22,6 +22,7 @@ config XTENSA
 	select HAVE_PERF_EVENTS
 	select IRQ_DOMAIN
 	select MODULES_USE_ELF_RELA
+	select PERF_USE_VMALLOC
 	select VIRT_TO_BUS
 	help
 	  Xtensa processors are 32-bit RISC machines designed by Tensilica