From: Benoit Cousson Date: Wed, 22 Dec 2010 04:08:13 +0000 (-0700) Subject: OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=d9b98f5f9e20389c43370539ef3de4aba7cf1d79;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk The gating of pad_clks and slimbus_ck is controlled by the PRCM, but since the clock source is external, this is the SW responsability to gate / un-gate it when the mcpdm or slimbus module need to be used. There is no autogating possible with such external clock. Add SW control to enable / disable this SW gating in the pad_clks_ck and slimbus_clk clock node. Signed-off-by: Benoit Cousson Signed-off-by: Sebastien Guiriec Signed-off-by: Paul Walmsley Cc: Rajendra Nayak --- diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 91ab6f223b80..305019c44108 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -53,7 +53,9 @@ static struct clk extalt_clkin_ck = { static struct clk pad_clks_ck = { .name = "pad_clks_ck", .rate = 12000000, - .ops = &clkops_null, + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_CLKSEL_ABE, + .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, }; static struct clk pad_slimbus_core_clks_ck = { @@ -71,7 +73,9 @@ static struct clk secure_32k_clk_src_ck = { static struct clk slimbus_clk = { .name = "slimbus_clk", .rate = 12000000, - .ops = &clkops_null, + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_CLKSEL_ABE, + .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, }; static struct clk sys_32k_ck = {