From: Janghyuck Kim <janghyuck.kim@samsung.com>
Date: Mon, 21 May 2018 11:10:11 +0000 (+0900)
Subject: [9610] arm64: dtsi: add scaler node
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=d9ad1d5d1cfd92b87e3718a4c76e7f918e1cd6fe;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

[9610] arm64: dtsi: add scaler node

Change-Id: Ie5164db4a8607417b4c68fa34909028901ac4bc2
Signed-off-by: Janghyuck Kim <janghyuck.kim@samsung.com>
---

diff --git a/arch/arm64/boot/dts/exynos/exynos9610.dtsi b/arch/arm64/boot/dts/exynos/exynos9610.dtsi
index 49dc6980343d..5af0cdc42e27 100644
--- a/arch/arm64/boot/dts/exynos/exynos9610.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos9610.dtsi
@@ -102,6 +102,7 @@
 		dpp3 = &dpp_3;
 		dsim0 = &dsim_0;
 		decon0 = &decon_f;
+		scaler0 = &scaler_0;
 	};
 
 	chipid@10000000 {
@@ -2708,7 +2709,7 @@
 		#size-cells = <1>;
 		ranges;
 
-		domain-clients = <&fimg2d>;
+		domain-clients = <&fimg2d>, <&scaler_0>;
 	};
 
 	fimg2d: g2d@12E40000 {
@@ -2737,6 +2738,15 @@
 		dma-coherent;
 	};
 
+	scaler_0: scaler@12E60000 {
+		  compatible = "samsung,exynos5-scaler";
+		  reg = <0x0 0x12E60000 0x3000>;
+		  interrupts = <0 164 0>;
+		  clocks = <&clock GATE_MSCL_QCH>;
+		  clock-names = "gate";
+		  iommus = <&sysmmu_g2d>;
+	};
+
 	/* G3D */
 	mali: mali@11500000 {
 		compatible = "arm,mali";