From: Uwe Kleine-König Date: Tue, 12 Jan 2010 14:57:59 +0000 (+0100) Subject: staging: fix typos "couter" -> "counter" X-Git-Tag: MMI-PSA29.97-13-9~24618^2~1^2~192 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=d5a2ffd8e8d602293339f69180aff8914c454d83;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git staging: fix typos "couter" -> "counter" This patch was generated by git grep -l 'couter' drivers/staging | xargs -r perl -p -i -e 's/couter/counter/' Signed-off-by: Uwe Kleine-König Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/drivers/adl_pci9118.c b/drivers/staging/comedi/drivers/adl_pci9118.c index 791ea8334e1e..9934a3cf2548 100644 --- a/drivers/staging/comedi/drivers/adl_pci9118.c +++ b/drivers/staging/comedi/drivers/adl_pci9118.c @@ -88,9 +88,9 @@ Configuration options: #define IORANGE_9118 64 /* I hope */ #define PCI9118_CHANLEN 255 /* len of chanlist, some source say 256, but reality looks like 255 :-( */ -#define PCI9118_CNT0 0x00 /* R/W: 8254 couter 0 */ -#define PCI9118_CNT1 0x04 /* R/W: 8254 couter 0 */ -#define PCI9118_CNT2 0x08 /* R/W: 8254 couter 0 */ +#define PCI9118_CNT0 0x00 /* R/W: 8254 counter 0 */ +#define PCI9118_CNT1 0x04 /* R/W: 8254 counter 0 */ +#define PCI9118_CNT2 0x08 /* R/W: 8254 counter 0 */ #define PCI9118_CNTCTRL 0x0c /* W: 8254 counter control */ #define PCI9118_AD_DATA 0x10 /* R: A/D data */ #define PCI9118_DA1 0x10 /* W: D/A registers */ diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c index 951e57949f7f..03c73a889048 100644 --- a/drivers/staging/comedi/drivers/adv_pci1710.c +++ b/drivers/staging/comedi/drivers/adv_pci1710.c @@ -84,9 +84,9 @@ Configuration options: #define PCI171x_DAREF 14 /* W: D/A reference control */ #define PCI171x_DI 16 /* R: digi inputs */ #define PCI171x_DO 16 /* R: digi inputs */ -#define PCI171x_CNT0 24 /* R/W: 8254 couter 0 */ -#define PCI171x_CNT1 26 /* R/W: 8254 couter 1 */ -#define PCI171x_CNT2 28 /* R/W: 8254 couter 2 */ +#define PCI171x_CNT0 24 /* R/W: 8254 counter 0 */ +#define PCI171x_CNT1 26 /* R/W: 8254 counter 1 */ +#define PCI171x_CNT2 28 /* R/W: 8254 counter 2 */ #define PCI171x_CNTCTRL 30 /* W: 8254 counter control */ /* upper bits from status register (PCI171x_STATUS) (lower is same woth control reg) */