From: Tony Luck Date: Thu, 24 Aug 2017 16:26:52 +0000 (-0700) Subject: x86/intel_rdt: Turn off most RDT features on Skylake X-Git-Tag: MMI-PSA29.97-13-9~4846^2 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=d56593eb5eda8f593db92927059697bbf89bc4b3;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git x86/intel_rdt: Turn off most RDT features on Skylake Errata list is included in this document: https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/6th-gen-x-series-spec-update.pdf with more details in: https://www.intel.com/content/www/us/en/processors/xeon/scalable/xeon-scalable-spec-update.html But the tl;dr summary (using tags from first of the documents) is: SKZ4 MBM does not accurately track write bandwidth SKZ17 CMT counters may not count accurately SKZ18 CAT may not restrict cacheline allocation under certain conditions SKZ19 MBM counters may undercount Disable all these features on Skylake models. Users who understand the errata may re-enable using boot command line options. Signed-off-by: Tony Luck Cc: Fenghua" Cc: Ravi V" Cc: "Peter Zijlstra" Cc: "Stephane Eranian" Cc: "Andi Kleen" Cc: "David Carrillo-Cisneros" Cc: Vikas Shivappa Link: http://lkml.kernel.org/r/3aea0a3bae219062c812668bd9b7b8f1a25003ba.1503512900.git.tony.luck@intel.com Signed-off-by: Thomas Gleixner --- diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c index b641622003cf..cd5fc61ba450 100644 --- a/arch/x86/kernel/cpu/intel_rdt.c +++ b/arch/x86/kernel/cpu/intel_rdt.c @@ -769,6 +769,9 @@ static __init void rdt_quirks(void) if (!rdt_options[RDT_FLAG_L3_CAT].force_off) cache_alloc_hsw_probe(); break; + case INTEL_FAM6_SKYLAKE_X: + if (boot_cpu_data.x86_mask <= 4) + set_rdt_options("!cmt,!mbmtotal,!mbmlocal,!l3cat"); } }