From: Chris Zhong Date: Wed, 22 Mar 2017 01:54:49 +0000 (+0800) Subject: dt-bindings: add the grf clock for dw-mipi-dsi X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=d3dffdc260d79026f385d6b52d2ec7b6cda559fc;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git dt-bindings: add the grf clock for dw-mipi-dsi For RK3399, the grf clock should be controlled by dw-mipi-dsi driver, add the description for this clock. Acked-by: Rob Herring Reviewed-by: Sean Paul Signed-off-by: Sean Paul Link: http://patchwork.freedesktop.org/patch/msgid/1490147691-4489-3-git-send-email-zyw@rock-chips.com --- diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 188f6f7403e6..1d722f5055ab 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -10,7 +10,7 @@ Required properties: - interrupts: Represent the controller's interrupt to the CPU(s). - clocks, clock-names: Phandles to the controller's pll reference clock(ref) and APB clock(pclk). For RK3399, a phy config clock - (phy_cfg) is additional required. As described in [1]. + (phy_cfg) and a grf clock(grf) are required. As described in [1]. - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. - ports: contain a port node with endpoint definitions as defined in [2]. For vopb,set the reg = <0> and set the reg = <1> for vopl.