From: Stef van Os Date: Wed, 20 Jan 2010 03:59:39 +0000 (+0000) Subject: powerpc/4xx: Add pcix type 1 transactions X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=d234b3c36ff600b2a51cff74c9263cba5b2c24ee;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git powerpc/4xx: Add pcix type 1 transactions Some of the newer 4xx pci cores need an explicit bit set to send type 1 transactions instead of just comparing the bus numbers. This patch enables type 1 transations for pcix nodes, thus enabling devices behind PCI bridges. Signed-off-by: Stef van Os Signed-off-by: Benjamin Herrenschmidt --- diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 6ff9d71b4c0d..8aa33021e50b 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -569,7 +569,8 @@ static void __init ppc4xx_probe_pcix_bridge(struct device_node *np) hose->last_busno = bus_range ? bus_range[1] : 0xff; /* Setup config space */ - setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, 0); + setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, + PPC_INDIRECT_TYPE_SET_CFG_TYPE); /* Disable all windows */ writel(0, reg + PCIX0_POM0SA);