From: Samuel Thibault Date: Fri, 24 Feb 2006 21:03:59 +0000 (-0800) Subject: [PATCH] vgacon: no vertical resizing on EGA X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=d1521260f57d70d0ba86d2a309ec1ce7979be2fc;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [PATCH] vgacon: no vertical resizing on EGA EGA boards suck: they mostly have write-only registers. This is particularly problematic for the overflow register: for being able to write to it, we would have to handle vertical sync & such too, which (I'd say) would potentially break a lot of configurations. Instead, just disabling vertical resize for EGA boards is just nice enough (horizontal resize still works). Fixes http://bugzilla.kernel.org/show_bug.cgi?id=6106 Signed-off-by: Samuel Thibault Cc: Rafal Olearski Cc: "Antonino A. Daplas" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c index 12d9329d1408..5a86978537d2 100644 --- a/drivers/video/console/vgacon.c +++ b/drivers/video/console/vgacon.c @@ -509,57 +509,60 @@ static int vgacon_doresize(struct vc_data *c, { unsigned long flags; unsigned int scanlines = height * c->vc_font.height; - u8 scanlines_lo, r7, vsync_end, mode, max_scan; + u8 scanlines_lo = 0, r7 = 0, vsync_end = 0, mode, max_scan; spin_lock_irqsave(&vga_lock, flags); - outb_p(VGA_CRTC_MAX_SCAN, vga_video_port_reg); - max_scan = inb_p(vga_video_port_val); - - if (max_scan & 0x80) - scanlines <<= 1; - vgacon_xres = width * VGA_FONTWIDTH; vgacon_yres = height * c->vc_font.height; - outb_p(VGA_CRTC_MODE, vga_video_port_reg); - mode = inb_p(vga_video_port_val); + if (vga_video_type >= VIDEO_TYPE_VGAC) { + outb_p(VGA_CRTC_MAX_SCAN, vga_video_port_reg); + max_scan = inb_p(vga_video_port_val); - if (mode & 0x04) - scanlines >>= 1; + if (max_scan & 0x80) + scanlines <<= 1; - scanlines -= 1; - scanlines_lo = scanlines & 0xff; + outb_p(VGA_CRTC_MODE, vga_video_port_reg); + mode = inb_p(vga_video_port_val); - outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); - r7 = inb_p(vga_video_port_val) & ~0x42; + if (mode & 0x04) + scanlines >>= 1; - if (scanlines & 0x100) - r7 |= 0x02; - if (scanlines & 0x200) - r7 |= 0x40; + scanlines -= 1; + scanlines_lo = scanlines & 0xff; - /* deprotect registers */ - outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); - vsync_end = inb_p(vga_video_port_val); - outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); - outb_p(vsync_end & ~0x80, vga_video_port_val); + outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); + r7 = inb_p(vga_video_port_val) & ~0x42; + + if (scanlines & 0x100) + r7 |= 0x02; + if (scanlines & 0x200) + r7 |= 0x40; + + /* deprotect registers */ + outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); + vsync_end = inb_p(vga_video_port_val); + outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); + outb_p(vsync_end & ~0x80, vga_video_port_val); + } outb_p(VGA_CRTC_H_DISP, vga_video_port_reg); outb_p(width - 1, vga_video_port_val); outb_p(VGA_CRTC_OFFSET, vga_video_port_reg); outb_p(width >> 1, vga_video_port_val); - outb_p(VGA_CRTC_V_DISP_END, vga_video_port_reg); - outb_p(scanlines_lo, vga_video_port_val); - outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); - outb_p(r7,vga_video_port_val); + if (vga_video_type >= VIDEO_TYPE_VGAC) { + outb_p(VGA_CRTC_V_DISP_END, vga_video_port_reg); + outb_p(scanlines_lo, vga_video_port_val); + outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); + outb_p(r7,vga_video_port_val); - /* reprotect registers */ - outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); - outb_p(vsync_end, vga_video_port_val); + /* reprotect registers */ + outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); + outb_p(vsync_end, vga_video_port_val); + } spin_unlock_irqrestore(&vga_lock, flags); - return 0; }