From: Michael Chan <mchan@broadcom.com>
Date: Fri, 21 Aug 2009 16:20:48 +0000 (+0000)
Subject: bnx2: Refine coalescing parameters.
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=cf7474a6f4eda22603591b7d6253dffc224e4784;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

bnx2: Refine coalescing parameters.

- Set the USE_INT_PARAM bit so the rx-frames-irq and tx-frames-irq will take
  effect on 5709.
- Increase the default rx-frames to reduce interrupt count.
- Decrease the default rx-frames-irq and tx-frames-irq to catch more events
  during NAPI poll.

All these will reduce interrupts without affecting latency.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index e025833e664f..ea6e6b73f494 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -4921,7 +4921,7 @@ bnx2_init_chip(struct bnx2 *bp)
 	}
 
 	if (bp->flags & BNX2_FLAG_ONE_SHOT_MSI)
-		val |= BNX2_HC_CONFIG_ONE_SHOT;
+		val |= BNX2_HC_CONFIG_ONE_SHOT | BNX2_HC_CONFIG_USE_INT_PARAM;
 
 	REG_WR(bp, BNX2_HC_CONFIG, val);
 
@@ -7858,13 +7858,13 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
 
 	bp->rx_csum = 1;
 
-	bp->tx_quick_cons_trip_int = 20;
+	bp->tx_quick_cons_trip_int = 2;
 	bp->tx_quick_cons_trip = 20;
-	bp->tx_ticks_int = 80;
+	bp->tx_ticks_int = 18;
 	bp->tx_ticks = 80;
 
-	bp->rx_quick_cons_trip_int = 6;
-	bp->rx_quick_cons_trip = 6;
+	bp->rx_quick_cons_trip_int = 2;
+	bp->rx_quick_cons_trip = 12;
 	bp->rx_ticks_int = 18;
 	bp->rx_ticks = 18;