From: Ralf Baechle Date: Tue, 6 Jan 2009 23:07:20 +0000 (+0000) Subject: MIPS: Only write c0_framemask on CPUs which have this register. X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=cde15b5927fea3e1b4de0b277008cf273d8b000b;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git MIPS: Only write c0_framemask on CPUs which have this register. Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 5ce2fa745626..9619f66e531e 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -478,7 +478,10 @@ void __cpuinit tlb_init(void) probe_tlb(config); write_c0_pagemask(PM_DEFAULT_MASK); write_c0_wired(0); - write_c0_framemask(0); + if (current_cpu_type() == CPU_R10000 || + current_cpu_type() == CPU_R12000 || + current_cpu_type() == CPU_R14000) + write_c0_framemask(0); temp_tlb_entry = current_cpu_data.tlbsize - 1; /* From this point on the ARC firmware is dead. */