From: Dave Airlie Date: Thu, 16 Dec 2010 04:49:02 +0000 (+1000) Subject: Merge remote branch 'nouveau/drm-nouveau-next' of ../drm-nouveau-next into drm-core... X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=ca9693a17368041dd5416b0f1f93daaf7a5a5308;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git Merge remote branch 'nouveau/drm-nouveau-next' of ../drm-nouveau-next into drm-core-next * 'nouveau/drm-nouveau-next' of ../drm-nouveau-next: (93 commits) drm/nv50: fix a couple of vm init issues drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation. drm/nouveau: kick vram functions out into an "engine" drm/nouveau: allow gpuobj vinst to be a virtual address when necessary drm/nv50: tidy up PCIEGART implementation drm/nv50: enable non-contig vram allocations where requested drm/nv50: enable 4KiB pages for small vram allocations drm/nv50: implement global channel address space on new VM code drm/nv50: implement BAR1/BAR3 management on top of new VM code drm/nv50: import new vm code drm/nv50: implement custom vram mm drm/nouveau: Avoid potential race between nouveau_fence_update() and context takedown. drm/nouveau: fix use of drm_mm_node in semaphore object drm/nouveau: wrap calls to ttm_bo_validate() drm/nouveau: no need to zero dma objects, we fill them completely anyway drm/nouveau: introduce a util function to wait on reg != val drm/nouveau: implicitly insert non-DMA objects into RAMHT drm/nouveau: make fifo.create_context() responsible for mapping control regs drm/nouveau: Spin for a bit in nouveau_fence_wait() before yielding the CPU. drm/nouveau: Use WC memory on the AGP GART. ... --- ca9693a17368041dd5416b0f1f93daaf7a5a5308