From: David S. Miller <davem@davemloft.net>
Date: Sun, 21 Aug 2011 00:25:36 +0000 (-0700)
Subject: Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/jkirsher/net... 
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=ca1ba7caa68520864e4b9227e67f3bbc6fed373b;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

Merge branch 'master' of /linux/kernel/git/jkirsher/net-next

Conflicts:
	drivers/net/ethernet/intel/e1000e/netdev.c
---

ca1ba7caa68520864e4b9227e67f3bbc6fed373b
diff --cc drivers/net/ethernet/intel/e1000e/netdev.c
index b1f925bfb8b6,6ea342e8e158..9742bc603cad
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@@ -518,65 -547,8 +547,65 @@@ static void e1000_rx_checksum(struct e1
  	adapter->hw_csum_good++;
  }
  
 +/**
 + * e1000e_update_tail_wa - helper function for e1000e_update_[rt]dt_wa()
 + * @hw: pointer to the HW structure
 + * @tail: address of tail descriptor register
 + * @i: value to write to tail descriptor register
 + *
 + * When updating the tail register, the ME could be accessing Host CSR
 + * registers at the same time.  Normally, this is handled in h/w by an
 + * arbiter but on some parts there is a bug that acknowledges Host accesses
 + * later than it should which could result in the descriptor register to
 + * have an incorrect value.  Workaround this by checking the FWSM register
 + * which has bit 24 set while ME is accessing Host CSR registers, wait
 + * if it is set and try again a number of times.
 + **/
 +static inline s32 e1000e_update_tail_wa(struct e1000_hw *hw, u8 __iomem * tail,
 +					unsigned int i)
 +{
 +	unsigned int j = 0;
 +
 +	while ((j++ < E1000_ICH_FWSM_PCIM2PCI_COUNT) &&
 +	       (er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI))
 +		udelay(50);
 +
 +	writel(i, tail);
 +
 +	if ((j == E1000_ICH_FWSM_PCIM2PCI_COUNT) && (i != readl(tail)))
 +		return E1000_ERR_SWFW_SYNC;
 +
 +	return 0;
 +}
 +
 +static void e1000e_update_rdt_wa(struct e1000_adapter *adapter, unsigned int i)
 +{
 +	u8 __iomem *tail = (adapter->hw.hw_addr + adapter->rx_ring->tail);
 +	struct e1000_hw *hw = &adapter->hw;
 +
 +	if (e1000e_update_tail_wa(hw, tail, i)) {
 +		u32 rctl = er32(RCTL);
 +		ew32(RCTL, rctl & ~E1000_RCTL_EN);
 +		e_err("ME firmware caused invalid RDT - resetting\n");
 +		schedule_work(&adapter->reset_task);
 +	}
 +}
 +
 +static void e1000e_update_tdt_wa(struct e1000_adapter *adapter, unsigned int i)
 +{
 +	u8 __iomem *tail = (adapter->hw.hw_addr + adapter->tx_ring->tail);
 +	struct e1000_hw *hw = &adapter->hw;
 +
 +	if (e1000e_update_tail_wa(hw, tail, i)) {
 +		u32 tctl = er32(TCTL);
 +		ew32(TCTL, tctl & ~E1000_TCTL_EN);
 +		e_err("ME firmware caused invalid TDT - resetting\n");
 +		schedule_work(&adapter->reset_task);
 +	}
 +}
 +
  /**
-  * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
+  * e1000_alloc_rx_buffers - Replace used receive buffers
   * @adapter: address of board private structure
   **/
  static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,