From: Vineet Gupta Date: Thu, 9 May 2013 08:15:12 +0000 (+0530) Subject: ARC: [mm] serious bug in vaddr based icache flush X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=c917a36f5fe551748eb37bd1efdcccc1045a02ab;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git ARC: [mm] serious bug in vaddr based icache flush vaddr used to index the cache was clipped from the wrong end, and thus would potentially fail to flush the correct lines. The problem was dorment for so long because up until the recent optimizations it was only used for ptrace break-point only flushes. Signed-off-by: Vineet Gupta --- diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c index c854cf95f706..d48afebf9df5 100644 --- a/arch/arc/mm/cache_arc700.c +++ b/arch/arc/mm/cache_arc700.c @@ -421,7 +421,7 @@ static void __ic_line_inv_vaddr(unsigned long phy_start, unsigned long vaddr, num_lines = DIV_ROUND_UP(sz, ARC_ICACHE_LINE_LEN); #if (CONFIG_ARC_MMU_VER > 2) - vaddr &= ~ICACHE_LINE_MASK; + vaddr &= ICACHE_LINE_MASK; addr = phy_start; #else /* bits 17:13 of vaddr go as bits 4:0 of paddr */