From: JaeHun Jung Date: Tue, 8 May 2018 10:57:26 +0000 (+0900) Subject: [9610] arm64: dts: Add ufs property for bring up X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=c6ab0397a3c3f2b0dc2415f35592815faf04c361;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git [9610] arm64: dts: Add ufs property for bring up Change-Id: I7580daf073097825068c3ff2f24dc6870e2b36e0 Signed-off-by: JaeHun Jung --- diff --git a/arch/arm64/boot/dts/exynos/exynos9610-erd9610.dts b/arch/arm64/boot/dts/exynos/exynos9610-erd9610.dts index c462d2561b07..d18249c3c5b2 100644 --- a/arch/arm64/boot/dts/exynos/exynos9610-erd9610.dts +++ b/arch/arm64/boot/dts/exynos/exynos9610-erd9610.dts @@ -44,6 +44,29 @@ }; }; + firmware { + android { + compatible = "android,firmware"; + fstab { + compatible = "android,fstab"; + system { + compatible = "android,system"; + dev = "/dev/block/platform/13520000.ufs/by-name/system"; + type = "ext4"; + mnt_flags = "ro"; + fsmgr_flags = "wait"; + }; + vendor { + compatible = "android,vendor"; + dev = "/dev/block/platform/13520000.ufs/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro"; + fsmgr_flags = "wait"; + }; + }; + }; + }; + serial_0: uart@13820000 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynos9610-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos9610-pinctrl.dtsi index 71d8a031c62a..c7a67ecf5d2a 100644 --- a/arch/arm64/boot/dts/exynos/exynos9610-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos9610-pinctrl.dtsi @@ -378,6 +378,145 @@ #interrupt-cells = <2>; }; + ufs_rst_n: ufs-rst-n { + samsung,pins = "gpf0-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-con-pdn = <3>; + }; + + ufs_refclk_out: ufs-refclk-out { + samsung,pins = "gpf0-0"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-con-pdn = <3>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpf0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpf0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_rdqs: sd0-rdqs { + samsung,pins = "gpf0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <1>; + samsung,pin-drv = <3>; + }; + + sd0_clk_fast_slew_rate_1x: sd0-clk_fast_slew_rate_1x { + samsung,pins = "gpf0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + sd0_clk_fast_slew_rate_2x: sd0-clk_fast_slew_rate_2x { + samsung,pins = "gpf0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <1>; + }; + + sd0_clk_fast_slew_rate_3x: sd0-clk_fast_slew_rate_3x { + samsung,pins = "gpf0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd0_clk_fast_slew_rate_4x: sd0-clk_fast_slew_rate_4x { + samsung,pins = "gpf0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpf1-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpf2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpf2-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpf2-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpf2-3", "gpf2-4", "gpf2-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd2_clk_fast_slew_rate_1x: sd2-clk_fast_slew_rate_1x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk_fast_slew_rate_2x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <1>; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk_fast_slew_rate_3x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk_fast_slew_rate_4x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; }; /* TOP */ diff --git a/arch/arm64/boot/dts/exynos/exynos9610.dtsi b/arch/arm64/boot/dts/exynos/exynos9610.dtsi index 200360782022..e2fcfb6fb105 100644 --- a/arch/arm64/boot/dts/exynos/exynos9610.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos9610.dtsi @@ -16,6 +16,7 @@ #include #include #include "exynos9610-pinctrl.dtsi" +#include / { compatible = "samsung,armv8", "samsung,exynos9610"; @@ -251,6 +252,106 @@ }; #endif + ufs: ufs@0x13520000 { + /* ----------------------- */ + /* 1. SYSTEM CONFIGURATION */ + /* ----------------------- */ + compatible ="samsung,exynos-ufs"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + reg = + <0x0 0x13520000 0x200>, /* 0: HCI standard */ + <0x0 0x13521100 0x200>, /* 1: Vendor specificed */ + <0x0 0x13510000 0x8000>, /* 2: UNIPRO */ + <0x0 0x13530000 0x100>; /* 3: UFS protector */ + interrupts = <0 157 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + clocks = + /* aclk clock */ + <&clock GATE_UFS_EMBD_QCH_UFS>, + /* unipro clocks */ + <&clock UFS_EMBD>; + + clock-names = + /* aclk clocks */ + "GATE_UFS_EMBD_QCH_UFS", + /* unipro clocks */ + "UFS_EMBD"; + + /* PM QoS for INT power domain */ +/* ufs-pm-qos-int = <400000>;*/ + + /* DMA coherent callback, should be coupled with 'ufs-sys' */ + dma-coherent; + + /* UFS PHY isolation and TCXO control */ + samsung,pmu-phandle = <&pmu_system_controller>; + + /* TCXO exclusive control */ + tcxo-ex-ctrl = <0>; + + /* UFS IO coherency */ + samsung,sysreg-fsys-phandle = <&sysreg_fsys_system_controller>; + + /* ----------------------- */ + /* 2. UFS COMMON */ + /* ----------------------- */ + freq-table-hz = <0 0>, <0 0>; + + vcc-supply = <&ufs_fixed_vcc>; + vcc-fixed-regulator; + + + /* ----------------------- */ + /* 3. UFS EXYNOS */ + /* ----------------------- */ + hw-rev = ; + + /* power mode change */ + ufs,pmd-attr-lane = /bits/ 8 <1>; + ufs,pmd-attr-gear = /bits/ 8 <3>; + + /* hiberantion */ + ufs-rx-min-activate-time-cap = <3>; + ufs-rx-hibern8-time-cap = <2>; + ufs-tx-hibern8-time-cap = <2>; + + /* board type for UFS CAL */ + brd-for-cal = <0>; + + fmp-id = <0>; + smu-id = <0>; + + /* ----------------------- */ + /* 4. ADDITIONAL NODES */ + /* ----------------------- */ + ufs-phy { + #address-cells = <2>; + #size-cells = <1>; + ranges; + reg = <0x0 0x13524000 0x800>; + }; + + ufs-dma-coherency { + #address-cells = <2>; + #size-cells = <1>; + + offset = <0x1010>; + mask = <(BIT_8 | BIT_9)>; + val = <(BIT_8 | BIT_9)>; + }; + }; + + ufs_fixed_vcc: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "ufs-vcc"; + gpio = <&gpg4 0 0>; + regulator-boot-on; + enable-active-high; + }; + serial_0: uart@13820000 { compatible = "samsung,exynos-uart"; samsung,separate-uart-clk; @@ -273,4 +374,14 @@ compatible = "samsung,exynos9610-pmu", "syscon"; reg = <0x0 0x11860000 0x10000>; }; + + exynos-sysreg-fsys { + compatible = "samsung,exynos-sysreg-fsys"; + samsung,syscon-phandle = <&sysreg_fsys_system_controller>; + }; + + sysreg_fsys_system_controller: system-controller@13410000 { + compatible = "samsung,exynos9610-sysreg-fsys", "syscon"; + reg = <0x0 0x13410000 0x1020>; + }; };