From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Tue, 7 Apr 2015 09:03:02 +0000 (+0200)
Subject: Merge 4.0-rc7 into staging-next
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=c610f7f772aa06ae2bd8e5ace87cde4d90f70198;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git

Merge 4.0-rc7 into staging-next

We want those fixes (iio primarily) into the -next branch to help with
merge and testing issues.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

c610f7f772aa06ae2bd8e5ace87cde4d90f70198
diff --cc drivers/iio/accel/bmc150-accel.c
index 4026122a7592,75567fd457dc..73e87739d219
--- a/drivers/iio/accel/bmc150-accel.c
+++ b/drivers/iio/accel/bmc150-accel.c
@@@ -900,156 -839,8 +900,156 @@@ static int bmc150_accel_set_watermark(s
  	return 0;
  }
  
 +/*
 + * We must read at least one full frame in one burst, otherwise the rest of the
 + * frame data is discarded.
 + */
 +static int bmc150_accel_fifo_transfer(const struct i2c_client *client,
 +				      char *buffer, int samples)
 +{
 +	int sample_length = 3 * 2;
 +	u8 reg_fifo_data = BMC150_ACCEL_REG_FIFO_DATA;
 +	int ret = -EIO;
 +
 +	if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
 +		struct i2c_msg msg[2] = {
 +			{
 +				.addr = client->addr,
 +				.flags = 0,
 +				.buf = &reg_fifo_data,
 +				.len = sizeof(reg_fifo_data),
 +			},
 +			{
 +				.addr = client->addr,
 +				.flags = I2C_M_RD,
 +				.buf = (u8 *)buffer,
 +				.len = samples * sample_length,
 +			}
 +		};
 +
 +		ret = i2c_transfer(client->adapter, msg, 2);
 +		if (ret != 2)
 +			ret = -EIO;
 +		else
 +			ret = 0;
 +	} else {
 +		int i, step = I2C_SMBUS_BLOCK_MAX / sample_length;
 +
 +		for (i = 0; i < samples * sample_length; i += step) {
 +			ret = i2c_smbus_read_i2c_block_data(client,
 +							    reg_fifo_data, step,
 +							    &buffer[i]);
 +			if (ret != step) {
 +				ret = -EIO;
 +				break;
 +			}
 +
 +			ret = 0;
 +		}
 +	}
 +
 +	if (ret)
 +		dev_err(&client->dev, "Error transferring data from fifo\n");
 +
 +	return ret;
 +}
 +
 +static int __bmc150_accel_fifo_flush(struct iio_dev *indio_dev,
 +				     unsigned samples, bool irq)
 +{
 +	struct bmc150_accel_data *data = iio_priv(indio_dev);
 +	int ret, i;
 +	u8 count;
 +	u16 buffer[BMC150_ACCEL_FIFO_LENGTH * 3];
 +	int64_t tstamp;
 +	uint64_t sample_period;
 +	ret = i2c_smbus_read_byte_data(data->client,
 +				       BMC150_ACCEL_REG_FIFO_STATUS);
 +	if (ret < 0) {
 +		dev_err(&data->client->dev, "Error reading reg_fifo_status\n");
 +		return ret;
 +	}
 +
 +	count = ret & 0x7F;
 +
 +	if (!count)
 +		return 0;
 +
 +	/*
 +	 * If we getting called from IRQ handler we know the stored timestamp is
 +	 * fairly accurate for the last stored sample. Otherwise, if we are
 +	 * called as a result of a read operation from userspace and hence
 +	 * before the watermark interrupt was triggered, take a timestamp
 +	 * now. We can fall anywhere in between two samples so the error in this
 +	 * case is at most one sample period.
 +	 */
 +	if (!irq) {
 +		data->old_timestamp = data->timestamp;
 +		data->timestamp = iio_get_time_ns();
 +	}
 +
 +	/*
 +	 * Approximate timestamps for each of the sample based on the sampling
 +	 * frequency, timestamp for last sample and number of samples.
 +	 *
 +	 * Note that we can't use the current bandwidth settings to compute the
 +	 * sample period because the sample rate varies with the device
 +	 * (e.g. between 31.70ms to 32.20ms for a bandwidth of 15.63HZ). That
 +	 * small variation adds when we store a large number of samples and
 +	 * creates significant jitter between the last and first samples in
 +	 * different batches (e.g. 32ms vs 21ms).
 +	 *
 +	 * To avoid this issue we compute the actual sample period ourselves
 +	 * based on the timestamp delta between the last two flush operations.
 +	 */
 +	sample_period = (data->timestamp - data->old_timestamp);
 +	do_div(sample_period, count);
 +	tstamp = data->timestamp - (count - 1) * sample_period;
 +
 +	if (samples && count > samples)
 +		count = samples;
 +
 +	ret = bmc150_accel_fifo_transfer(data->client, (u8 *)buffer, count);
 +	if (ret)
 +		return ret;
 +
 +	/*
 +	 * Ideally we want the IIO core to handle the demux when running in fifo
 +	 * mode but not when running in triggered buffer mode. Unfortunately
 +	 * this does not seem to be possible, so stick with driver demux for
 +	 * now.
 +	 */
 +	for (i = 0; i < count; i++) {
 +		u16 sample[8];
 +		int j, bit;
 +
 +		j = 0;
 +		for_each_set_bit(bit, indio_dev->active_scan_mask,
 +				 indio_dev->masklength)
 +			memcpy(&sample[j++], &buffer[i * 3 + bit], 2);
 +
 +		iio_push_to_buffers_with_timestamp(indio_dev, sample, tstamp);
 +
 +		tstamp += sample_period;
 +	}
 +
 +	return count;
 +}
 +
 +static int bmc150_accel_fifo_flush(struct iio_dev *indio_dev, unsigned samples)
 +{
 +	struct bmc150_accel_data *data = iio_priv(indio_dev);
 +	int ret;
 +
 +	mutex_lock(&data->mutex);
 +	ret = __bmc150_accel_fifo_flush(indio_dev, samples, false);
 +	mutex_unlock(&data->mutex);
 +
 +	return ret;
 +}
 +
  static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
- 		"7.810000 15.630000 31.250000 62.500000 125 250 500 1000");
+ 		"15.620000 31.260000 62.50000 125 250 500 1000 2000");
  
  static struct attribute *bmc150_accel_attributes[] = {
  	&iio_const_attr_sampling_frequency_available.dev_attr.attr,