From: Andi Kleen Date: Mon, 21 May 2007 12:31:47 +0000 (+0200) Subject: i386: Clear MCE flag on AMD K6 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=c12ceb766eb5ac975c1145d51236fcdcf81a6578;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git i386: Clear MCE flag on AMD K6 It reports machine check capability in CPUID, but doesn't actually implement all the necessary MSRs of the standard Intel machine check architecture. This fixes a boot failure on K6s recently introduced. Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c index 4fec702afd7e..6f47eeeb93ea 100644 --- a/arch/i386/kernel/cpu/amd.c +++ b/arch/i386/kernel/cpu/amd.c @@ -280,6 +280,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) if (c->x86 == 0x10 && !force_mwait) clear_bit(X86_FEATURE_MWAIT, c->x86_capability); + + /* K6s reports MCEs but don't actually have all the MSRs */ + if (c->x86 < 6) + clear_bit(X86_FEATURE_MCE, c->x86_capability); } static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) diff --git a/arch/i386/kernel/cpu/mcheck/k7.c b/arch/i386/kernel/cpu/mcheck/k7.c index f9fa4142551e..eef63e3630c2 100644 --- a/arch/i386/kernel/cpu/mcheck/k7.c +++ b/arch/i386/kernel/cpu/mcheck/k7.c @@ -72,12 +72,12 @@ void amd_mcheck_init(struct cpuinfo_x86 *c) u32 l, h; int i; - machine_check_vector = k7_machine_check; - wmb(); - if (!cpu_has(c, X86_FEATURE_MCE)) return; + machine_check_vector = k7_machine_check; + wmb(); + printk (KERN_INFO "Intel machine check architecture supported.\n"); rdmsr (MSR_IA32_MCG_CAP, l, h); if (l & (1<<8)) /* Control register present ? */