From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Fri, 10 Nov 2017 17:55:18 +0000 (+0200)
Subject: pinctrl: denverton: Fix UART2 RTS pin mode
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=c05bbe5dc862789cbbc809a4c6b4422d0b158adb;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

pinctrl: denverton: Fix UART2 RTS pin mode


[ Upstream commit 4bd6683da2e64590bdc27ecf7e61ad8376861768 ]

UART2 RTS is mode 2 of the pin.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/pinctrl/intel/pinctrl-denverton.c b/drivers/pinctrl/intel/pinctrl-denverton.c
index 4500880240f2..6572550cfe78 100644
--- a/drivers/pinctrl/intel/pinctrl-denverton.c
+++ b/drivers/pinctrl/intel/pinctrl-denverton.c
@@ -207,7 +207,7 @@ static const unsigned int dnv_uart0_pins[] = { 60, 61, 64, 65 };
 static const unsigned int dnv_uart0_modes[] = { 2, 3, 1, 1 };
 static const unsigned int dnv_uart1_pins[] = { 94, 95, 96, 97 };
 static const unsigned int dnv_uart2_pins[] = { 60, 61, 62, 63 };
-static const unsigned int dnv_uart2_modes[] = { 1, 1, 2, 2 };
+static const unsigned int dnv_uart2_modes[] = { 1, 2, 2, 2 };
 static const unsigned int dnv_emmc_pins[] = {
 	142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152,
 };