From: Chris Wilson Date: Thu, 10 Jul 2014 19:31:18 +0000 (+0100) Subject: drm/i915: Move RPS evaluation interval counters to i915->rps X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=bf225f20d51fb1b77d47fce0628159a3eda027b9;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git drm/i915: Move RPS evaluation interval counters to i915->rps Place the RPS counters inside the RPS struct. Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 647ea67d0b1d..263a8799eb59 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -902,10 +902,10 @@ struct vlv_s0ix_state { u32 clock_gate_dis2; }; -struct intel_rps_ei_calc { - u32 cz_ts_ei; - u32 render_ei_c0; - u32 media_ei_c0; +struct intel_rps_ei { + u32 cz_clock; + u32 render_c0; + u32 media_c0; }; struct intel_gen6_power_mgmt { @@ -940,6 +940,9 @@ struct intel_gen6_power_mgmt { bool enabled; struct delayed_work delayed_resume_work; + /* manual wa residency calculations */ + struct intel_rps_ei up_ei, down_ei; + /* * Protects RPS/RC6 register access and PCU communication. * Must be taken after struct_mutex if nested. @@ -1534,13 +1537,6 @@ struct drm_i915_private { /* gen6+ rps state */ struct intel_gen6_power_mgmt rps; - /* rps wa up ei calculation */ - struct intel_rps_ei_calc rps_up_ei; - - /* rps wa down ei calculation */ - struct intel_rps_ei_calc rps_down_ei; - - /* ilk-only ips/rps state. Everything in here is protected by the global * mchdev_lock in intel_pm.c */ struct intel_ilk_power_mgmt ips; diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 0b4a8ed76a54..30fd63708b1a 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1273,7 +1273,7 @@ static void notify_ring(struct drm_device *dev, } static u32 vlv_c0_residency(struct drm_i915_private *dev_priv, - struct intel_rps_ei_calc *rps_ei) + struct intel_rps_ei *rps_ei) { u32 cz_ts, cz_freq_khz; u32 render_count, media_count; @@ -1286,22 +1286,22 @@ static u32 vlv_c0_residency(struct drm_i915_private *dev_priv, render_count = I915_READ(VLV_RENDER_C0_COUNT_REG); media_count = I915_READ(VLV_MEDIA_C0_COUNT_REG); - if (rps_ei->cz_ts_ei == 0) { - rps_ei->cz_ts_ei = cz_ts; - rps_ei->render_ei_c0 = render_count; - rps_ei->media_ei_c0 = media_count; + if (rps_ei->cz_clock == 0) { + rps_ei->cz_clock = cz_ts; + rps_ei->render_c0 = render_count; + rps_ei->media_c0 = media_count; return dev_priv->rps.cur_freq; } - elapsed_time = cz_ts - rps_ei->cz_ts_ei; - rps_ei->cz_ts_ei = cz_ts; + elapsed_time = cz_ts - rps_ei->cz_clock; + rps_ei->cz_clock = cz_ts; - elapsed_render = render_count - rps_ei->render_ei_c0; - rps_ei->render_ei_c0 = render_count; + elapsed_render = render_count - rps_ei->render_c0; + rps_ei->render_c0 = render_count; - elapsed_media = media_count - rps_ei->media_ei_c0; - rps_ei->media_ei_c0 = media_count; + elapsed_media = media_count - rps_ei->media_c0; + rps_ei->media_c0 = media_count; /* Convert all the counters into common unit of milli sec */ elapsed_time /= VLV_CZ_CLOCK_TO_MILLI_SEC; @@ -1337,9 +1337,9 @@ static u32 vlv_calc_delay_from_C0_counters(struct drm_i915_private *dev_priv) WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); - if (dev_priv->rps_up_ei.cz_ts_ei == 0) { - vlv_c0_residency(dev_priv, &dev_priv->rps_up_ei); - vlv_c0_residency(dev_priv, &dev_priv->rps_down_ei); + if (dev_priv->rps.up_ei.cz_clock == 0) { + vlv_c0_residency(dev_priv, &dev_priv->rps.up_ei); + vlv_c0_residency(dev_priv, &dev_priv->rps.down_ei); return dev_priv->rps.cur_freq; } @@ -1354,10 +1354,10 @@ static u32 vlv_calc_delay_from_C0_counters(struct drm_i915_private *dev_priv) dev_priv->rps.ei_interrupt_count = 0; residency_C0_down = vlv_c0_residency(dev_priv, - &dev_priv->rps_down_ei); + &dev_priv->rps.down_ei); } else { residency_C0_up = vlv_c0_residency(dev_priv, - &dev_priv->rps_up_ei); + &dev_priv->rps.up_ei); } new_delay = dev_priv->rps.cur_freq;