From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 12 Jul 2005 16:12:05 +0000 (+0000)
Subject: Detect the 34K.
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=bbc7f22f6dca8a075b565ade49e9a982f89707c3;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

Detect the 34K.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 2b6db681417d..e40bd6fccea5 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -104,6 +104,7 @@ static inline void check_wait(void)
 /*	case CPU_20KC:*/
 	case CPU_24K:
 	case CPU_25KF:
+	case CPU_34K:
 		cpu_wait = r4k_wait;
 		printk(" available.\n");
 		break;
@@ -538,6 +539,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
 		/* Probe for L2 cache */
 		c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
 		break;
+	case PRID_IMP_34K:
+		c->cputype = CPU_34K;
+		c->isa_level = MIPS_CPU_ISA_M32;
+		break;
 	}
 }
 
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index cf31d3952d65..1bd40af508ed 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -72,6 +72,7 @@ static const char *cpu_name[] = {
 	[CPU_20KC]	= "MIPS 20Kc",
 	[CPU_24K]	= "MIPS 24K",
 	[CPU_25KF]	= "MIPS 25Kf",
+	[CPU_34K]	= "MIPS 34K",
 	[CPU_VR4111]	= "NEC VR4111",
 	[CPU_VR4121]	= "NEC VR4121",
 	[CPU_VR4122]	= "NEC VR4122",
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 7bd8584fafb2..c1d394d36f6c 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -879,6 +879,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
 
 	case CPU_4KEC:
 	case CPU_24K:
+	case CPU_34K:
 		i_ehb(p);
 		tlbw(p);
 		break;
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 2a109a5e0932..e6927442f7b4 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -77,6 +77,7 @@
 #define PRID_IMP_4KEMPR2	0x9100
 #define PRID_IMP_4KSD		0x9200
 #define PRID_IMP_24K		0x9300
+#define PRID_IMP_34K		0x9500
 #define PRID_IMP_24KE		0x9600
 
 #define PRID_IMP_UNKNOWN	0xff00
@@ -185,7 +186,8 @@
 #define CPU_AU1550		57
 #define CPU_24K			58
 #define CPU_AU1200		59
-#define CPU_LAST		59
+#define CPU_34K			60
+#define CPU_LAST		60
 
 /*
  * ISA Level encodings