From: Bin Meng Date: Mon, 11 Sep 2017 09:41:53 +0000 (-0700) Subject: spi-nor: intel-spi: Fix broken software sequencing codes X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=bb76fcebb9c9edf843581e44c6a0a60033f3a66f;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git spi-nor: intel-spi: Fix broken software sequencing codes commit 9d63f17661e25fd28714dac94bdebc4ff5b75f09 upstream. There are two bugs in current intel_spi_sw_cycle(): - The 'data byte count' field should be the number of bytes transferred minus 1 - SSFSTS_CTL is the offset from ispi->sregs, not ispi->base Signed-off-by: Bin Meng Acked-by: Mika Westerberg Signed-off-by: Cyrille Pitchen Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c index 8a596bfeddff..7802ac3ba934 100644 --- a/drivers/mtd/spi-nor/intel-spi.c +++ b/drivers/mtd/spi-nor/intel-spi.c @@ -422,7 +422,7 @@ static int intel_spi_sw_cycle(struct intel_spi *ispi, u8 opcode, u8 *buf, if (ret < 0) return ret; - val = (len << SSFSTS_CTL_DBC_SHIFT) | SSFSTS_CTL_DS; + val = ((len - 1) << SSFSTS_CTL_DBC_SHIFT) | SSFSTS_CTL_DS; val |= ret << SSFSTS_CTL_COP_SHIFT; val |= SSFSTS_CTL_FCERR | SSFSTS_CTL_FDONE; val |= SSFSTS_CTL_SCGO; @@ -432,7 +432,7 @@ static int intel_spi_sw_cycle(struct intel_spi *ispi, u8 opcode, u8 *buf, if (ret) return ret; - status = readl(ispi->base + SSFSTS_CTL); + status = readl(ispi->sregs + SSFSTS_CTL); if (status & SSFSTS_CTL_FCERR) return -EIO; else if (status & SSFSTS_CTL_AEL)