From: Benjamin Herrenschmidt Date: Sat, 24 Jun 2017 17:29:01 +0000 (-0500) Subject: powerpc/64s: Invalidate ERAT on powersave wakeup for POWER9 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=ba6d334ac230065243a92bb7cb3fd6a5f6a7f8ac;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git powerpc/64s: Invalidate ERAT on powersave wakeup for POWER9 On POWER9 the ERAT may be incorrect on wakeup from some stop states that lose state. This causes random segvs and illegal instructions when these stop states are enabled. This patch invalidates the ERAT on wakeup on POWER9 to prevent this from causing a problem. Signed-off-by: Michael Neuling Signed-off-by: Benjamin Herrenschmidt Reviewed-by: Nicholas Piggin [mpe: Merge comment change with upstream changes] Signed-off-by: Michael Ellerman --- diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 07b79c2c70f8..02a82777fd5b 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -99,9 +99,11 @@ EXC_VIRT_NONE(0x4000, 0x100) #ifdef CONFIG_PPC_P7_NAP /* * If running native on arch 2.06 or later, check if we are waking up - * from nap/sleep/winkle, and branch to idle handler. The idle wakeup - * handler initially runs in real mode, but we branch to the 0xc000... - * address so we can turn on relocation with mtmsr. + * from nap/sleep/winkle, and branch to idle handler. This tests SRR1 + * bits 46:47. A non-0 value indicates that we are coming from a power + * saving state. The idle wakeup handler initially runs in real mode, + * but we branch to the 0xc000... address so we can turn on relocation + * with mtmsr. */ #define IDLETEST(n) \ BEGIN_FTR_SECTION ; \ diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S index 1ea14b96f126..f6518c768d2a 100644 --- a/arch/powerpc/kernel/idle_book3s.S +++ b/arch/powerpc/kernel/idle_book3s.S @@ -435,6 +435,13 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300) * cr3 - set to gt if waking up with partial/complete hypervisor state loss */ pnv_restore_hyp_resource_arch300: + /* + * Workaround for POWER9, if we lost resources, the ERAT + * might have been mixed up and needs flushing. + */ + blt cr3,1f + PPC_INVALIDATE_ERAT +1: /* * POWER ISA 3. Use PSSCR to determine if we * are waking up from deep idle state