From: Jan Glauber Date: Sat, 23 Jul 2016 10:42:51 +0000 (+0200) Subject: spi: octeon: Store system clock freqency in struct octeon_spi X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=b9e64763b68dbbf87a54b28edf89cd92c8ef51dd;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git spi: octeon: Store system clock freqency in struct octeon_spi Storing the system clock frequency in struct octeon_spi avoids calling the MIPS specific octeon_get_io_clock_rate() for every transfer. Signed-off-by: Jan Glauber Tested-by: Steven J. Hill Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-octeon.c b/drivers/spi/spi-octeon.c index b53ba530a1c8..e72204089a88 100644 --- a/drivers/spi/spi-octeon.c +++ b/drivers/spi/spi-octeon.c @@ -30,6 +30,7 @@ struct octeon_spi { void __iomem *register_base; u64 last_cfg; u64 cs_enax; + int sys_freq; }; static void octeon_spi_wait_ready(struct octeon_spi *p) @@ -53,7 +54,6 @@ static int octeon_spi_do_transfer(struct octeon_spi *p, union cvmx_mpi_cfg mpi_cfg; union cvmx_mpi_tx mpi_tx; unsigned int clkdiv; - unsigned int speed_hz; int mode; bool cpha, cpol; const u8 *tx_buf; @@ -65,9 +65,7 @@ static int octeon_spi_do_transfer(struct octeon_spi *p, cpha = mode & SPI_CPHA; cpol = mode & SPI_CPOL; - speed_hz = xfer->speed_hz; - - clkdiv = octeon_get_io_clock_rate() / (2 * speed_hz); + clkdiv = p->sys_freq / (2 * xfer->speed_hz); mpi_cfg.u64 = 0; @@ -194,6 +192,7 @@ static int octeon_spi_probe(struct platform_device *pdev) } p->register_base = reg_base; + p->sys_freq = octeon_get_io_clock_rate(); master->num_chipselect = 4; master->mode_bits = SPI_CPHA |