From: Elaine Zhang Date: Tue, 8 Aug 2017 07:19:33 +0000 (+0800) Subject: clk: rockchip: add some critical clocks for rv1108 SoC X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=b75f38451a5d7b6893087ca6c0ec7b01491f60b0;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git clk: rockchip: add some critical clocks for rv1108 SoC the bus/periph/nclk_ddrupctl/pclk_ddrmon/pclk_acodecphy/pclk_pmu no driver to handle them, Chip design requirements for these clock to always on. Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner --- diff --git a/drivers/clk/rockchip/clk-rv1108.c b/drivers/clk/rockchip/clk-rv1108.c index f907b67745e4..d1065dd9f442 100644 --- a/drivers/clk/rockchip/clk-rv1108.c +++ b/drivers/clk/rockchip/clk-rv1108.c @@ -776,10 +776,16 @@ static struct rockchip_clk_branch rv1108_clk_branches[] __initdata = { static const char *const rv1108_critical_clocks[] __initconst = { "aclk_core", - "aclk_bus_src_gpll", + "aclk_bus", + "hclk_bus", + "pclk_bus", "aclk_periph", "hclk_periph", "pclk_periph", + "nclk_ddrupctl", + "pclk_ddrmon", + "pclk_acodecphy", + "pclk_pmu", }; static void __init rv1108_clk_init(struct device_node *np)